US2016043032A1PendingUtilityA1
Memory circuit structure and semiconductor process for manufacturing the same
Est. expiryNov 21, 2033(~7.4 yrs left)· nominal 20-yr term from priority
H10P 76/4085H10P 50/71H10W 20/43H01L 27/11524H01L 23/528H01L 27/1157H10B 43/35H10B 41/35
45
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Claims
Abstract
A memory circuit structure includes a substrate, a plurality of word lines disposed and evenly-spaced on the substrate, wherein the width of said word lines is F, and a select gate adjacent to the word lines, wherein the width of the select gate is (7+4n)F, and n is zero or positive integer.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A memory circuit structure, comprising:
a substrate; a plurality of word lines disposed and evenly-spaced on said substrate and, wherein the width of said word lines is F; and a select gate adjacent to said word lines, wherein the width of said select gate is (7+4n) F, and n is zero or positive integer.
2 . A memory circuit structure according to claim 1 , wherein the spacing between said select gate and said word lines is (2n+1)F.Cited by (0)
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