Chemically differentiated sensor array

Abstract

A chemically differentiated sensor array system includes a plurality of environmentally-gated transistors and an environmental gate, wherein the environmental gate includes a liquid solution and each environmentally-gated transistor includes a drain, a source, and a Carbon-based substrate channel, the drain electrically couples to a first location on the substrate channel, the source electrically couples to a second location on the substrate channel separated by a gap from the first location on the substrate channel, the environmental gate covers and contacts the substrate channel, a first insulating layer covers and separates the drain from the environmental gate, and a second insulating layer covers and separates the source from the environmental gate.

What is claimed is: 
     
         1 . A chemically differentiated sensor array system comprising:
 a plurality of environmentally-gated transistors and an environmental gate, wherein the environmental gate comprises a liquid solution and each environmentally-gated transistor comprises:
 a drain, a source, and a substrate channel; 
 wherein the substrate channel comprises Carbon, the drain electrically couples to a first location on the substrate channel, the source electrically couples to a second location on the substrate channel separated by a gap from the first location on the substrate channel, the environmental gate covers and contacts the substrate channel, a first insulating layer covers and separates the drain from the environmental gate, and a second insulating layer covers and separates the source from the environmental gate. 
   
     
     
         2 . The system of  claim 1 , wherein the drain electrically couples to a drain lead, the source electrically couples to a source lead, the environmental gate electrically couples to a gate electrode, and the gate electrode, source lead, and drain lead each electrically couple to a power supply. 
     
     
         3 . The system of  claim 2 , wherein the substrate channel comprises Graphene or Carbon nanotubes. 
     
     
         4 . The system of  claim 2 , wherein the environmental gate comprises a water, alcohol, or metal. 
     
     
         5 . The system of  claim 2 , wherein the environmental gate comprises a biological sample. 
     
     
         6 . The system of  claim 5 , wherein the biological sample comprises blood, urine, bacterial growth media, or food. 
     
     
         7 . The system of  claim 2 , wherein one or more of the environmentally-gated transistors further comprises a sensitization layer, wherein the sensitization layer covers and separates the substrate channel from the environmental gate. 
     
     
         8 . The system of  claim 7 , wherein the sensitization layer comprises a polymer or a protein. 
     
     
         9 . The system of  claim 2 , wherein a first one of the environmentally-gated transistors further comprises a first sensitization layer covering and separating the substrate channel of the first one of the environmentally-gated transistors from the environmental gate and a second one of the environmentally-gated transistors further comprises a second sensitization layer covering and separating the substrate channel of the second one of the environmentally-gated transistors from the environmental gate. 
     
     
         10 . The system of  claim 2 , further comprising an electrical measurement device electrically coupled to the source lead or drain lead of each environmentally-gated transistors, the electrical measurement device configured to measure voltage, on-site resistance, or transconductance. 
     
     
         11 . The system of  claim 10 , further comprising a computing module, wherein the computing module is configured to receive an output signal from the electrical measurement device indicating an electrical measurement value, and the identify a composition of the environmental gate based on the output signal. 
     
     
         12 . An environmentally-gated transistor comprising:
 a drain, a source, a substrate channel, and an environmental gate;   wherein the substrate channel comprises a first semiconducting material;   the drain electrically couples to a first location on the substrate channel;   the source electrically couples to a second location on the substrate channel separated by a gap from the first location on the substrate channel;   the environmental gate covers and contacts the substrate channel;   a first insulating layer covers and separates the drain from the environmental gate;   a second insulating layer covers and separates the source from the environmental gate; and   the environmental gate electrically couples to a gate electrode.   
     
     
         13 . The environmentally-gated transistor of  claim 12 , wherein the substrate channel comprises Graphene or Carbon nanotubes. 
     
     
         14 . The environmentally-gated transistor of  claim 12 , wherein the environmental gate comprises a water, alcohol, or metal. 
     
     
         15 . The environmentally-gated transistor of  claim 12 , wherein the environmental gate comprises a biological sample. 
     
     
         16 . The environmentally-gated transistor of  claim 15 , wherein the biological sample comprises blood, urine, bacterial growth media, or food. 
     
     
         17 . The environmentally-gated transistor of  claim 12 , further comprising a sensitization layer, wherein the sensitization layer covers and separates the substrate channel from the environmental gate. 
     
     
         18 . The environmentally-gated transistor of  claim 17 , wherein the sensitization layer comprises a polymer or a protein. 
     
     
         19 . A system of environmentally-gated transistors comprising:
 a plurality of environmentally-gated transistors, wherein each environmentally-gated transistor comprises:
 a drain, a source, a substrate channel, and an environmental gate; 
 wherein the substrate channel comprises a first semiconducting material; 
 the drain electrically couples to a first location on the substrate channel; 
 the source electrically couples to a second location on the substrate channel separated by a gap from the first location on the substrate channel; 
 the environmental gate covers and contacts the substrate channel; 
 a first insulating layer covers and separates the drain from the environmental gate; 
 a second insulating layer covers and separates the source from the environmental gate; and 
 the environmental gate electrically couples to a gate electrode. 
   
     
     
         20 . The system of  claim 19 , wherein each environmentally-gated transistor electrically couples to a power supply and an electrical measurement device.