US2016085680A1PendingUtilityA1

Mobile Memory Cache Read Optimization

53
Assignee: MEMORY TECHNOLOGIES LLCPriority: Jul 11, 2011Filed: Dec 3, 2015Published: Mar 24, 2016
Est. expiryJul 11, 2031(~5 yrs left)· nominal 20-yr term from priority
G06F 2212/6026G06F 2212/1024G06F 12/0862G06F 2212/161Y02D10/00
53
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

Examples of enabling cache read optimization for mobile memory devices are described. One or more access commands may be received, from a host, at a memory device. The one or more access commands may instruct the memory device to access at least two data blocks. The memory device may generate pre-fetch information for the at least two data blocks based at least in part on an order of accessing the at least two data blocks.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method comprising:
 receiving at least one access command, at a memory device from a host, the at least one access command instructing the memory device to access at least two data blocks;   accessing the at least two data blocks; and   generating, by the memory device, pre-fetch information for the at least two data blocks based at least in part on an order of accessing the at least two data blocks.   
     
     
         2 . The method of  claim 1 , where generating the pre-fetch information is further based on at least one of: information provided by the host, and rules in a controller for the memory device. 
     
     
         3 . The method of  claim 1 , where each access command of the at least one access command is associated with index information comprising at least one of: a context identifier, a task tag, a pre-fetch identifier and a group number. 
     
     
         4 . The method of  claim 3 , where the at least one access command comprises a first access command and a second access command, and
 the first access command and the second access command comprise identical index information.   
     
     
         5 . The method of  claim 3 , where receiving the at least one access command comprises:
 receiving a first access command at a first time comprising first index information,   receiving a second access command at a second time after the first time, where the second access command comprises second index information which differs from the first index information, and   receiving a third access command at a third time after the second time comprising the first index information.   
     
     
         6 . The method of  claim 5 , where generating the pre-fetch information comprises linking a last data block accessed in response to the first access command to a first data block accessed in response to the third access command. 
     
     
         7 . The method of  claim 5 , where generating the pre-fetch information comprises starting a new linking data session for a first data block accessed in response to the third access command,
 where data blocks accessed in response to access commands having the same index information are linked during a linking data session.   
     
     
         8 . The method of  claim 3 , where data blocks accessed in response to access commands having matching index information are linked during a linking data session, and further comprising starting a new linking data session in response to one of: an elapse of a predetermined time after a previous access commands having the matching index information, an elapse of time after the linking data session was started, and a change in a control register. 
     
     
         9 . The method of  claim 1 , where generating the pre-fetch information comprises linking a first data block of the at least two data blocks to a next subsequently accessed data block of the at least two data blocks. 
     
     
         10 . The method of  claim 1 , where the pre-fetch information comprise instructions to pre-fetch at least two blocks when a first block is read. 
     
     
         11 . The method of  claim 1 , further comprising:
 receiving a first read command instructing the memory device to provide a first read data block to the host;   providing the first read data block to the host;   determining a subsequent read data block based on the pre-fetch information;   pre-fetching the subsequent read data block;   after pre-fetching the subsequent read data block, receiving a second read command instructing the memory device to provide the subsequent read data block to the host; and   providing the pre-fetched subsequent read data block to the host.   
     
     
         12 . The method of  claim 1 , further comprising receiving a command to cease generating pre-fetch information for at least a portion of the memory device; and
 preventing generating pre-fetch information when accessing data blocks in the portion of the memory device.   
     
     
         13 . The method of  claim 1 , further comprising receiving at least one additional access command instructing the memory device to access at least one of the at least two data blocks; and
 removing the pre-fetch information based on an order of data blocks accessed in response to the at least one additional access command.   
     
     
         14 . An apparatus comprising:
 at least one processor; and   at least one memory device including computer program code that is executable by   the at least one processor to perform acts comprising:
 receiving at least one access command, at a memory device from a host, the at least one access command instructing the at least one memory device to access at least two data blocks; 
 accessing the at least two data blocks; and 
 generating, by the at least one memory device, pre-fetch information for the at least two data blocks based at least in part on an order of accessing the at least two data blocks. 
   
     
     
         15 . The apparatus of  claim 14 , where generating the pre-fetch information is further based on at least one of:
 information provided by the host, and   rules in a controller for the memory device.   
     
     
         16 . The apparatus of  claim 14 , where each access command of the at least one access command is associated with index information comprising at least one of: a context identifier, a task tag, a pre-fetch identifier and a group number. 
     
     
         17 . The apparatus of  claim 16 , where, when receiving the at least one access command, the acts further comprise:
 receiving a first access command at a first time comprising first index information,   receiving a second access command at a second time after the first time, where the second access command comprises second index information which differs from the first index information, and   receiving a third access command at a third time after the second time comprising the first index information.   
     
     
         18 . A non-transitory computer readable medium encoded with computer program code that is executable by one or more processors to perform acts comprising:
 receiving at least one access command, at a memory device from a host, the at least one access command instructing the memory device to access at least two data blocks;   accessing the at least two data blocks; and   generating, by the memory device, pre-fetch information for the at least two data blocks based at least in part on an order of accessing the at least two data blocks.   
     
     
         19 . The non-transitory computer readable medium of  claim 18 , where each access command of the at least one access command is associated with index information comprising at least one of: a context identifier, a task tag, a pre-fetch identifier and a group number. 
     
     
         20 . The non-transitory computer readable medium of  claim 18 , where:
 data blocks accessed in response to access commands having matching index information are linked during a linking data session, and   the acts further comprise:
 starting a new linking data session in response to one of: an elapse of a predetermined time after a previous access commands having the matching index information, an elapse of time after the linking data session was started, and a change in a control register.

Cited by (0)

No later patents cite this yet.

References (0)

No backward citations on record.