Method for Producing a Semiconductor Device
Abstract
A method for producing a semiconductor device having a sidewall insulation includes providing a semiconductor body having a first side and a second side lying opposite the first side. At least one first trench is at least partly filled with insulation material proceeding from the first side in the direction toward the second side into the semiconductor body. The at least one first trench is produced between a first semiconductor body region for a first semiconductor device and a second semiconductor body region for a second semiconductor device. An isolating trench extends from the first side of the semiconductor body in the direction toward the second side of the semiconductor body between the first and second semiconductor body regions in such a way that at least part of the insulation material of the first trench adjoins at least a sidewall of the isolating trench. The second side of the semiconductor body is partly removed as far as the isolating trench.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A method for producing a semiconductor device having a sidewall insulation, the method comprising:
forming a first trench that is at least partly filled with an insulation material, the first trench extending from a first surface of a semiconductor body into the semiconductor body toward a second surface of the semiconductor body, wherein the first trench is formed between a first semiconductor body region for a first semiconductor device and a second semiconductor body region for a second semiconductor device; forming an isolating trench that extends from the first surface of the semiconductor body toward the second surface of the semiconductor body between the first and second semiconductor body regions, wherein at least one sidewall of the isolating trench adjoins a sidewall of the first trench comprising the insulation material, wherein at least one other opposite sidewall of the isolating trench adjoins a sidewall of a semiconductor region of the semiconductor body, wherein a portion of the sidewall contacting the insulation material is laterally across a portion of the opposite sidewall contacting the semiconductor region along a plane parallel to the first surface; and singulating the semiconductor body to separate the first semiconductor device from the second semiconductor device, wherein singulating the semiconductor body comprises removing a portion of the semiconductor body at the second surface as far as the isolating trench.
2 . The method as claimed in claim 1 , wherein forming the first trench comprises forming a plurality of first trenches between the first and second semiconductor body regions, wherein the isolating trench is formed between two of the first trenches.
3 . The method as claimed in claim 1 , wherein the isolating trench is formed in a first trench.
4 . The method as claimed in claim 1 , wherein the first trench has a width B of at least 2 μm and the isolating trench is formed in such a way that an insulation layer composed of the insulation material of the first trench having a thickness D of at least 2 μm adjoins the sidewall of the isolating trench.
5 . The method as claimed in claim 1 , wherein forming the first trench comprises:
forming a plurality of subtrenches alongside one another in a region where the first trench is to be formed, the subtrenches extending from the first surface toward the second surface in such a way that a ridge of the semiconductor body is formed between the subtrenches; and converting the ridge into an insulation material.
6 . The method as claimed in claim 5 , wherein an unfilled part of the subtrench remaining after converting the ridge into an insulation material is filled with a material.
7 . The method as claimed in claim 6 , wherein the unfilled part of the subtrench is filled with an insulation material.
8 . The method as claimed in claim 7 , wherein the unfilled part of the subtrench is filled with a material that has a stress-reducing effect.
9 . The method as claimed in claim 5 , wherein the ridge is converted into the insulation material by oxidation.
10 . The method as claimed in claim 1 , further comprising, after forming the first trench, forming a dopant region in the semiconductor body for the first semiconductor device.
11 . The method as claimed in claim 10 , further comprising, after forming the isolating trench, forming an electrically conductive layer on the insulation material of the first trench, wherein the insulation material adjoins the sidewall of the isolating trench, wherein the electrically conductive layer is formed in such a way that it extends from the insulation material of the first trench that adjoins the sidewall of the isolating trench as far as at least one contact region for the dopant region, wherein the dopant region and the insulation material are part of the first semiconductor device.
12 . The method as claimed in claim 11 , further comprising an electrically conductive contact element in the contact region between the electrically conductive layer and the dopant region, such that an electrical connection is formed between the dopant region and the electrically conductive layer.
13 . The method as claimed in claim 1 , further comprising, after forming the isolating trench, forming an electrically conductive layer on the insulation material of the first trench, wherein the insulation material adjoins the sidewall of the isolating trench.
14 . The method as claimed in claim 1 , further comprising forming an insulation layer in the semiconductor body parallel to the first surface.
15 . The method as claimed in claim 14 , wherein the first trench is formed as far as the insulation layer.
16 . The method as claimed in claim 1 , wherein the sidewall of the isolating trench is formed with a positive flank angle.
17 . The method as claimed in claim 1 , wherein, after the singulating, the first semiconductor device comprises a major sidewall including the insulation material and the second semiconductor device comprises a major sidewall exposing a portion of the semiconductor region of the semiconductor body.
18 . A method for producing a semiconductor device having a sidewall insulation, the method comprising:
providing a semiconductor wafer having a first surface and a second surface opposite the first surface, the semiconductor wafer comprising a first semiconductor device and a second semiconductor device; forming a first trench filled at least partly with an insulation material, the first trench extending from the first surface into the semiconductor wafer toward the second surface, wherein the first trench is formed between a first semiconductor body region for the first semiconductor device and a second semiconductor body region for the second semiconductor device, wherein forming the first trench comprising forming a plurality of subtrenches, lining the plurality of subtrenches with a first insulation material, and filling the plurality of subtrenches with amorphous silicon, wherein the amorphous silicon is configured to counteract mechanical stress generated by lining the plurality of subtrenches with the first insulation material; forming an isolating trench in the first trench, wherein at least part of the insulation material of the first trench adjoins a sidewall of the isolating trench, wherein at least one other opposite sidewall of the isolating trench adjoins a sidewall of a semiconductor region of the first semiconductor body region, wherein a portion of the sidewall contacting the insulation material is laterally across a portion of the opposite sidewall contacting the semiconductor region along a plane parallel to the first surface; and singulating the semiconductor wafer to separate the first semiconductor device from the second semiconductor device, wherein singulating the semiconductor wafer comprises thinning the semiconductor wafer from the second surface to the isolating trench.
19 . The method as claimed in claim 18 , wherein the insulation material of the first trench adjoins two opposite sidewalls of the isolating trench.Join the waitlist — get patent alerts
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