Liquid crystal display panel having three conductive layers

Abstract

A display panel includes a first substrate, a second substrate opposite to the first substrate, and a liquid crystal layer positioned between the first substrate and the second substrate. The first substrate includes a first base plate, plural scan lines and plural data lines formed on the first base plate and intersected each other, wherein two adjacent scan lines and two adjacent data lines define a pixels region. Each pixel region includes a first transparent conductive layer formed above the first base plate, an insulating layer formed on the first transparent conductive layer, and a second transparent conductive layer formed on the insulating layer. The second substrate includes a second base plate and a third transparent conductive layer formed on the second base plate.

What is claimed is: 
     
         1 . A display panel, comprising:
 a first substrate, comprising:
 a first base plate; 
 scan lines and data lines, formed on the first base plate and intersected each other, wherein two of the adjacent scan lines and two of the adjacent data lines define a pixels region, and one of the pixel regions comprising:
 a first transparent conductive layer formed on the first base plate; 
 an insulating layer formed on the first transparent conductive layer; and 
 a second transparent conductive layer formed on the insulating layer, 
 
   a second substrate, opposite to the first substrate, and the second substrate comprising a second base plate and a third transparent conductive layer formed on the second base plate; and   a liquid crystal layer, positioned between the first substrate and the second substrate.   
     
     
         2 . The display panel according to  claim 1 , wherein a first vertical electric field is generated between the first transparent conductive layer and the third transparent conductive layer, and a second vertical electric field is generated between the second transparent conductive layer and the third transparent conductive layer during operation of the display panel. 
     
     
         3 . The display panel according to  claim 1 , wherein the first transparent conductive layer is a full film, and the second transparent conductive layer is a patterned film. 
     
     
         4 . The display panel according to  claim 3 , wherein a coverage area of the first transparent conductive layer is substantially equal to a coverage area of the second transparent conductive layer. 
     
     
         5 . The display panel according to  claim 1 , wherein the first transparent conductive layer and the second transparent conductive layer have different patterns. 
     
     
         6 . The display panel according to  claim 5 , wherein a coverage area of the first transparent conductive layer is smaller than a coverage area of the second transparent conductive layer. 
     
     
         7 . The display panel according to  claim 5 , wherein the first transparent conductive layer comprises a first full section and a second full section isolated from each other, and the first full section and the second full section are respectively coupled to a first transistor and a second transistor of said pixel region. 
     
     
         8 . The display panel according to  claim 7 , wherein the second transparent conductive layer is electrically connected to the second transistor. 
     
     
         9 . The display panel according to  claim 7 , wherein the second full section surrounds the first full section. 
     
     
         10 . The display panel according to  claim 5 , wherein the first transparent conductive layer has a plurality of first slits, the second transparent conductive layer has a plurality of second slits, and positions of the plurality of first slits are staggered from positions of the plurality of second slits. 
     
     
         11 . The display panel according to  claim 10 , wherein extending directions of the first slits are identical to extending directions of the second slits. 
     
     
         12 . The display panel according to  claim 1 , wherein the first transparent conductive layer is electrically connected to the second transparent conductive layer. 
     
     
         13 . The display panel according to  claim 1 , wherein the first transparent conductive layer and the second transparent conductive layer are independently controlled. 
     
     
         14 . The display panel according to  claim 13 , wherein the first transparent conductive layer is electrically connected to a first transistor of said pixel region, and the second transparent conductive layer is electrically connected to a second transistor of said pixel region. 
     
     
         15 . The display panel according to  claim 13 , wherein the first transparent conductive layer and the second transparent conductive layer are respectively applied with different voltages during operation of the display panel. 
     
     
         16 . The display panel according to  claim 13 , wherein the first transparent conductive layer is applied with a voltage of V MITO , and the second transparent conductive layer is applied with a voltage of V TITO  during operation of the display panel, wherein 0≦|V MITO −V TITO |≦4. 
     
     
         17 . The display panel according to  claim 1 , wherein the insulating layer has a thickness in a range of 1000 Å to 4000 Å. 
     
     
         18 . The display panel according to  claim 1 , wherein the insulating layer has a thickness in a range of 1500 Å to 2500 Å. 
     
     
         19 . The display panel according to  claim 1 , wherein the insulating layer positioned between the first transparent conductive layer and the second transparent conductive layer is a multi-layer, and the multi-layer comprises plural inorganic material insulating layers, or comprises at least one organic material insulating layer and at least one inorganic material insulating layer.