Associating energy consumption with a virtual machine

Abstract

Associating processor and processor core energy consumption with a task such as a virtual machine is disclosed. Various events cause a trace record to be written to a trace buffer for a processor. An identifier associated with a task using a processor core of the processor is read. In addition, one or more values associated with an energy consumption of the processor core are read. In response to the event, the one or more values associated with the energy consumption of the processor core and the identifier are written to the trace buffer memory.

What is claimed is: 
     
         1 . A method for execution on a processor having a plurality of chiplets, the method comprising:
 in response to detecting, by an activity sense point of a chiplet, a first event:
 determining data associated with energy consumption of the chiplet, 
 reading a task identifier from a first register of the chiplet, and 
 writing the data associated with the energy consumption of the chiplet and the task identifier to the first memory; and 
   in response to detection of a second event:
 reading the data associated with energy consumption and associated task identifiers from the first memory, 
 for each task identifier read from the first memory, writing the data associated with the energy consumption of the chiplet and the task identifier to a second memory. 
   
     
     
         2 . The method of  claim 1 , wherein the task identifier comprises an identifier associated with a task to be executed on a processor core of the chiplet, wherein the method further comprises receiving, into the first register from a hypervisor, the task identifier. 
     
     
         3 . The method of  claim 1 , further comprising:
 aggregating data associate with energy consumption of the chiplets according to the task identifiers;   wherein writing the data associated with the energy consumption of the chiplet and the task identifier to the second memory comprises writing the aggregated data to the second memory.   
     
     
         4 . The method of  claim 1 , wherein each task identifier identifies a virtual machine, wherein the second memory is accessible by a hypervisor. 
     
     
         5 . The method of  claim 1 , wherein the second event is selected from a group consisting of: one or more of an expiration of a timer, a change in internal or external voltage for at least one of the plurality of processor cores, a change in frequency for at least one of the plurality of processor cores, a change in a voltage regulator module, a change in a power state for at least one of the plurality of processor cores, or a change in the task identifier indicated in the first register of at least one of the plurality of processor cores. 
     
     
         6 . The method of  claim 1 , wherein the data associated with energy consumption of the chiplet is further associated with at least one of a plurality of voltage domains of the chiplet. 
     
     
         7 . The method of  claim 1 , wherein the first event is selected from a group consisting of: at least one of load and store operations, instruction dispatch, fixed point operations, floating point operations, cache reads, and cache writes. 
     
     
         8 . A computer program product for associating energy consumption with a task, the computer program product comprising:
 a computer readable storage medium having computer usable program code embodied therewith, the computer usable program code comprising a computer usable program code configured to:
 in response to detection of a first event by an activity sense point of a chiplet of a plurality of chiplets:
 determine data associated with energy consumption of the chiplet, 
 read a task identifier from a first register of the chiplet, and 
 write the data associated with the energy consumption of the chiplet and the task identifier to the first memory; and 
 
 in response to detection of a second event:
 read the data associated with energy consumption and associated task identifiers from the first memory, 
 for each task identifier read from the first memory, write the data associated with the energy consumption of the chiplet and the task identifier to a second memory. 
 
   
     
     
         9 . The computer program product of  claim 8 , wherein the task identifier comprises an identifier associated with a task to be executed on a processor core of the chiplet, and wherein the computer usable program code further includes computer usable program code configured to receive, into the first register from a hypervisor, the task identifier. 
     
     
         10 . The computer program product of  claim 8 , wherein the computer usable program code further includes computer usable program code configured to:
 aggregate data associate with energy consumption of the plurality of chiplets according to the task identifiers;   wherein computer usable program code configured to write the data associated with the energy consumption of the chiplet and the task identifier to the second memory comprises computer usable program code configured to write the aggregated data to the second memory.   
     
     
         11 . The computer program product of  claim 8 , wherein the second event is selected from a group consisting of: one or more of an expiration of a timer, a change in internal or external voltage for at least one of the plurality of processor cores, a change in frequency for at least one of the plurality of processor cores, a change in a voltage regulator module, a change in a power state for at least one of the plurality of processor cores, or a change in the task identifier indicated in the first register of at least one of the plurality of processor cores. 
     
     
         12 . The computer program product of  claim 8 , wherein the data associated with energy consumption of the chiplet is further associated with at least one of a plurality of voltage domains of the chiplet. 
     
     
         13 . The computer program product of  claim 8 , wherein the first event is selected from a group consisting of: at least one of load and store operations, instruction dispatch, fixed point operations, floating point operations, cache reads, and cache writes. 
     
     
         14 . A processor comprising:
 a first memory; and   a plurality of chiplets, wherein each chiplet comprises:
 a processor core; 
 a first register to store a task identifier; 
 a plurality of activity sense points; 
   wherein each chiplet is configured to:
 in response to a first event:
 determine data associated with energy consumption of the chiplet, 
 read the task identifier from the first register, and 
 write the data associated with energy consumption of the chiplet and the task identifier to the first memory; and 
 
   wherein the processor is configured to:
 in response to detection of a second event:
 read the data associated with energy consumption of the chiplet and associated identifiers from the first memory, 
 for each identifier read from the first memory, write the data associated with the energy consumption and the task identifier to a second memory. 
 
   
     
     
         15 . The processor of  claim 14 , wherein the second event comprises at least one of a change in an identifier in the first register or a change in power state indicated in a second register. 
     
     
         16 . The processor of  claim 14 , wherein the first event is selected from a group consisting of: an expiration of a timer, a change in internal or external voltage of the chiplet, a change in frequency of the chiplet, a change in a power state of the chiplet, or a change in an identifier indicated in the first register, or a change in a voltage regulator module. 
     
     
         17 . The processor of  claim 14 , wherein each chiplet further includes:
 one or more activity counters updated in response to detection of the first event; and   one or more activity weight registers to store weightings associated with the one or more activity counters;   wherein the processor is further configured to apply the weightings to values of the one or more activity counters associated with an energy consumption of the processor core.   
     
     
         18 . The processor of  claim 17 , further comprising:
 a plurality of activity sense points, the plurality of activity sense points configured to maintain the one or more activity counters.   
     
     
         19 . The processor of  claim 14 , wherein the processor is further configured to aggregate the data associated with energy consumption according to the task identifiers.