Self-aligned gated emitter tip arrays

Abstract

Methods for fabrication of self-aligned gated tip arrays are described. The methods are performed on a multilayer structure that includes a substrate, an intermediate layer that includes a dielectric material disposed over at least a portion of the substrate, and at least one gate electrode layer disposed over at least a portion of the intermediate layer. The method includes forming a via through at least a portion of the at least one gate electrode layer. The via through the at least one gate electrode layer defines a gate aperture. The method also includes etching at least a portion of the intermediate layer proximate to the gate aperture such that an emitter structure at least partially surrounded by a trench is formed in the multilayer structure.

1 . A method for forming a self-aligned gated emitter cell, comprising:
 providing a multilayer structure, comprising:
 a substrate; 
 an intermediate layer comprising a dielectric material disposed over at least a portion of the substrate; and 
 at least one gate electrode layer disposed over at least a portion of the intermediate layer; 
   forming a via through at least a portion of the at least one gate electrode layer, wherein the via through the at least one gate electrode layer defines a gate aperture; and   etching at least a portion of the intermediate layer proximate to the gate aperture such that an emitter structure at least partially surrounded by a trench is formed in the multilayer structure.   
     
     
         2 - 27 . (canceled)