US2016276506A1PendingUtilityA1

Solar cell

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Assignee: INTELLECTUAL KEYSTONE TECH LLCPriority: Nov 8, 2011Filed: Mar 21, 2016Published: Sep 22, 2016
Est. expiryNov 8, 2031(~5.3 yrs left)· nominal 20-yr term from priority
H10F 77/219H10F 77/211H10F 77/206H10F 77/20H10F 19/908H10F 10/166H10F 10/146H10F 19/00H10F 77/30H10F 77/148H10F 10/10H01L 31/03529H01L 31/0747H01L 31/0516H01L 31/0682H01L 31/022441Y02E10/547Y02E10/548
45
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Claims

Abstract

A solar cell including a first conductive type semiconductor substrate; a first intrinsic semiconductor layer on a front surface of the semiconductor substrate; a first conductive type first semiconductor layer on at least one surface of the first intrinsic semiconductor layer; a second conductive type second semiconductor layer on a back surface of the semiconductor substrate; a second intrinsic semiconductor layer between the second semiconductor layer and the semiconductor substrate; a first conductive type third semiconductor layer on the back surface of the semiconductor substrate, the third semiconductor layer being spaced apart from the second semiconductor layer; and a third intrinsic semiconductor layer between the third semiconductor layer and the semiconductor substrate.

Claims

exact text as granted — not AI-modified
21 . A solar cell comprising:
 a semiconductor substrate having a first conductive type and comprising a front surface and a back surface;   a first intrinsic semiconductor layer over the front surface of the semiconductor substrate;   a plurality of first semiconductor layers comprising a first layer on a back surface of the first intrinsic semiconductor layer and a second layer on a front surface of the first intrinsic semiconductor layer;   a passivation layer on the back surface of the semiconductor substrate, the passivation layer having first and second openings that expose the back surface of the semiconductor substrate;   a second semiconductor layer of a second conductivity type disposed inside the first opening;   a second intrinsic semiconductor layer inside the first opening between the second semiconductor layer and the semiconductor substrate and between the second semiconductor layer and the passivation layer;   a third semiconductor layer of the first conductive type disposed inside the second opening, the third semiconductor layer being spaced apart from the second semiconductor layer; and   a third intrinsic semiconductor layer inside the second opening between the third semiconductor layer and the semiconductor substrate and between the third semiconductor layer and the passivation layer.   
     
     
         22 . The solar cell of  claim 21 , further comprising a fourth semiconductor layer of the first conductivity type formed inside the semiconductor substrate, the fourth semiconductor layer having an impurity concentration higher than that of the semiconductor layer. 
     
     
         23 . The solar cell of  claim 22 , wherein a width of the fourth semiconductor layer is greater than a width of the second opening. 
     
     
         24 . The solar cell of  claim 22 , wherein the fourth semiconductor layer is in contact with the third intrinsic semiconductor layer in the second opening. 
     
     
         25 . The solar cell of  claim 21 , wherein the second semiconductor layer extends over the semiconductor substrate and the side wall of the first opening. 
     
     
         26 . The solar cell of  claim 21 , wherein the first layer comprises a high concentration doping region between the semiconductor substrate and the first intrinsic semiconductor layer. 
     
     
         27 . The solar cell of  claim 21 , wherein the second layer comprises an amorphous silicon layer of the first conductivity type on the front surface of the first intrinsic semiconductor layer. 
     
     
         28 . The solar cell of  claim 21 , further comprising an anti-reflective layer over the front surface of the semiconductor substrate, the front surface of the semiconductor substrate having a textured surface structure. 
     
     
         29 . The solar cell of  claim 21 , wherein the passivation layer comprises a stacked layer structure including a fourth intrinsic semiconductor layer and a silicon nitride layer. 
     
     
         30 . The solar cell of  claim 21 , wherein the passivation layer comprises a stacked layer structure including a silicon oxide layer and a silicon nitride layer. 
     
     
         31 . The solar cell of  claim 21 , wherein the second semiconductor layer is approximately the same size as the second intrinsic semiconductor layer. 
     
     
         32 . A solar cell comprising:
 a semiconductor substrate of a first conductivity type;   a first intrinsic semiconductor layer on a front surface of the semiconductor substrate;   a first semiconductor layer of the first conductivity type on either a front surface or a back surface of the first intrinsic semiconductor layer;   a passivation layer on a back surface of the semiconductor substrate, the passivation layer having a stacked layer structure of an oxide layer and a nitride layer, the passivation layer having first and second openings through which the back surface of the semiconductor substrate is exposed;   a second semiconductor layer of a second conductive type disposed inside the first opening over an exposed portion of the semiconductor substrate in the first opening, a side wall of the first opening constituting a side wall of the passivation layer, and a back surface of the passivation layer adjacent the first opening;   a second intrinsic semiconductor layer disposed inside the first opening between the second semiconductor layer and the semiconductor substrate and between the second semiconductor layer and the passivation layer, so as to prevent the second semiconductor layer from directly contacting the semiconductor layer or the passivation layer;   a third semiconductor layer of the first conductive type disposed inside the second opening over an exposed portion of the semiconductor substrate in the second opening, a side wall of the second opening constituting a side wall of the passivation layer, and the back surface of the passivation layer adjacent the second opening; and   a third intrinsic semiconductor layer disposed inside the second opening between the third semiconductor layer and the semiconductor substrate and between the third semiconductor layer and the passivation layer, so as to prevent the third semiconductor layer from directly contacting the semiconductor layer or the passivation layer, the third intrinsic semiconductor layer being spaced apart from the second intrinsic semiconductor layer.   
     
     
         33 . The solar cell of  claim 32 , wherein the oxide layer comprises a fourth intrinsic semiconductor layer 
     
     
         34 . The solar cell of  claim 32 , wherein the oxide layer comprises a silicon oxide; and the nitride layer comprises a silicon nitride layer. 
     
     
         35 . The solar cell of  claim 32 , wherein the first semiconductor layer comprises:
 a first layer between the semiconductor substrate and the first intrinsic semiconductor layer, the first layer comprising a high concentration doping region; and   a second layer on the front surface of the first intrinsic semiconductor layer, the second layer comprising an amorphous silicon layer.   
     
     
         36 . The solar cell of  claim 32 , further comprising a fourth semiconductor layer of the first conductivity type formed inside the semiconductor substrate with an impurity concentration higher than that of the semiconductor layer, the fourth semiconductor layer contacting the third intrinsic semiconductor layer. 
     
     
         37 . The solar cell of  claim 36 , wherein a width of the fourth semiconductor layer is greater than a width of the second opening. 
     
     
         38 . The solar cell of  claim 32 , wherein:
 the second semiconductor layer is approximately the same size as the second intrinsic semiconductor layer, and the third semiconductor layer is approximately the same size as the third intrinsic semiconductor layer.   
     
     
         39 . The solar cell of  claim 32 , wherein the back surface of the semiconductor substrate is substantially planar. 
     
     
         40 . The solar cell of  claim 32 , further comprising:
 a first electrode on the back surface of the second semiconductor layer; and   a second electrode on the back surface of the third semiconductor layer, wherein the first electrode and the second electrode each have a stacked layer structure including a transparent electrode layer and a metal electrode layer.

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