US2016283152A1PendingUtilityA1

Resource access control

42
Assignee: MICROSOFT TECHNOLOGY LICENSING LLCPriority: Jun 17, 2010Filed: Jun 10, 2016Published: Sep 29, 2016
Est. expiryJun 17, 2030(~3.9 yrs left)· nominal 20-yr term from priority
G06F 9/5016G06F 12/1425G06F 2209/5021G06F 3/0622G06F 2212/1052G06F 3/0655G06F 3/0619G06F 3/0679
42
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Claims

Abstract

Various embodiments enable mappings of logical regions to physical regions for a memory resource for data writes to be maintained. A first mapping of logical regions to physical regions and a second mapping of logical regions to physical regions for a memory resource are maintained. The second mapping comprises a safe state of the memory resource. Responsive to receiving a request to write data to a logical region of the logical regions, a first set of data is written to a first physical region of the physical regions according to the first mapping of logical regions to physical regions. Responsive to receiving a request to read data from the logical region of the logical regions, a second set of data is read from a second physical region of the physical regions according to the second mapping of logical regions to physical regions.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A computer system, comprising:
 one or more processors; and   one or more computer readable storage media having stored thereon computer-executable instructions that are executable by the one or more processors to cause the computer system to enable mappings of logical regions to physical regions for a memory resource for data writes to be maintained, the computer-executable instructions including instructions that are executable to cause the computer system to perform at least the following:
 maintain a first mapping of logical regions to physical regions and a second mapping of logical regions to physical regions for a memory resource, the second mapping of logical regions to physical regions comprising a safe state of the memory resource; 
 responsive to receiving a request to write data to a logical region of the logical regions, write a first set of data to a first physical region of the physical regions according to the first mapping of logical regions to physical regions; and 
 responsive to receiving a request to read data from the logical region of the logical regions, read a second set of data from a second physical region of the physical regions according to the second mapping of logical regions to physical regions. 
   
     
     
         2 . The computer system of  claim 1 , the computer-executable instructions also including instructions that are executable to cause the computer system to maintain a header that indicates that the second mapping of logical regions to physical regions comprises a safe state that can be used to read data from the logical region. 
     
     
         3 . The computer system of  claim 1 , wherein physical regions associated with the first mapping of logical regions to physical regions do not overlap with physical regions associated with the second mapping of logical regions to physical regions. 
     
     
         4 . The computer system of  claim 1 , wherein the request to read data from the logical region of the logical regions is received responsive to a device restart operation. 
     
     
         5 . The computer system of  claim 1 , the computer-executable instructions also including instructions that are executable to cause the computer system to write the first mapping of logical regions to physical regions to the memory resource effective to cause the first mapping of logical regions to physical regions to be the safe state of the memory resource. 
     
     
         6 . The computer system of  claim 1 , wherein writing the first set of data to the first physical region comprises setting the first physical region to occupied. 
     
     
         7 . The computer system of  claim 1 , the computer-executable instructions also including instructions that are executable to cause the computer system to perform at least one of:
 based at least on data flushes being suppressed, store one or both of the first mapping of logical regions to physical regions or the second mapping of logical regions to physical regions in volatile memory; and   based at least on data flushes not being suppressed, store one or both of the first mapping of logical regions to physical regions or the second mapping of logical regions to physical regions in non-volatile memory.   
     
     
         8 . A method, implemented at a computer system that includes one or more processors, for enabling mappings of logical regions to physical regions for a memory resource for data writes to be maintained, the method comprising:
 maintaining a first mapping of logical regions to physical regions and a second mapping of logical regions to physical regions for a memory resource, the second mapping of logical regions to physical regions comprising a safe state of the memory resource;   responsive to receiving a request to write data to a logical region of the logical regions, writing a first set of data to a first physical region of the physical regions according to the first mapping of logical regions to physical regions; and   responsive to receiving a request to read data from the logical region of the logical regions, reading a second set of data from a second physical region of the physical regions according to the second mapping of logical regions to physical regions.   
     
     
         9 . The method of  claim 8 , further comprising maintaining a header that indicates that the second mapping of logical regions to physical regions comprises a safe state that can be used to read data from the logical region. 
     
     
         10 . The method of  claim 8 , wherein physical regions associated with the first mapping of logical regions to physical regions do not overlap with physical regions associated with the second mapping of logical regions to physical regions. 
     
     
         11 . The method of  claim 8 , wherein the request to read data from the logical region of the logical regions is received responsive to a device restart operation. 
     
     
         12 . The method of  claim 8 , further comprising writing the first mapping of logical regions to physical regions to the memory resource effective to cause the first mapping of logical regions to physical regions to be the safe state of the memory resource. 
     
     
         13 . The method of  claim 8 , wherein writing the first set of data to the first physical region comprises setting the first physical region to occupied. 
     
     
         14 . The method of  claim 8 , further comprising at least one of:
 based at least on data flushes being suppressed, storing one or both of the first mapping of logical regions to physical regions or the second mapping of logical regions to physical regions in volatile memory; and   based at least on data flushes not being suppressed, storing one or both of the first mapping of logical regions to physical regions or the second mapping of logical regions to physical regions in non-volatile memory.   
     
     
         15 . A computer program product comprising one or more hardware storage devices having stored thereon computer-executable instructions that are executable by one or more processors of a computer system to cause the computer system to enable mappings of logical regions to physical regions for a memory resource for data writes to be maintained, the computer-executable instructions including instructions that are executable to cause the computer system to perform at least the following:
 maintain a first mapping of logical regions to physical regions and a second mapping of logical regions to physical regions for a memory resource, the second mapping of logical regions to physical regions comprising a safe state of the memory resource;   responsive to receiving a request to write data to a logical region of the logical regions, write a first set of data to a first physical region of the physical regions according to the first mapping of logical regions to physical regions; and   responsive to receiving a request to read data from the logical region of the logical regions, read a second set of data from a second physical region of the physical regions according to the second mapping of logical regions to physical regions.   
     
     
         16 . The computer program product of  claim 15 , the computer-executable instructions also including instructions that are executable to cause the computer system to maintain a header that indicates that the second mapping of logical regions to physical regions comprises a safe state that can be used to read data from the logical region. 
     
     
         17 . The computer program product of  claim 15 , wherein physical regions associated with the first mapping of logical regions to physical regions do not overlap with physical regions associated with the second mapping of logical regions to physical regions. 
     
     
         18 . The computer program product of  claim 15 , wherein the request to read data from the logical region of the logical regions is received responsive to a device restart operation. 
     
     
         19 . The computer program product of  claim 15 , the computer-executable instructions also including instructions that are executable to cause the computer system to write the first mapping of logical regions to physical regions to the memory resource effective to cause the first mapping of logical regions to physical regions to be the safe state of the memory resource. 
     
     
         20 . The computer program product of  claim 15 , the computer-executable instructions also including instructions that are executable to cause the computer system to perform at least one of:
 based at least on data flushes being suppressed, store one or both of the first mapping of logical regions to physical regions or the second mapping of logical regions to physical regions in volatile memory; and   based at least on data flushes not being suppressed, store one or both of the first mapping of logical regions to physical regions or the second mapping of logical regions to physical regions in non-volatile memory.

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