Systems, Apparatuses, and Methods for Resource Bandwidth Enforcement

Abstract

Systems, methods, and apparatuses for resource bandwidth monitoring and control are described. For example, in some embodiments, an apparatus comprising a requestor device to send a credit based request, a receiver device to receive and consume the credit based request, and a delay element in a return path between the requestor and receiver devices, the delay element to delay a credit based response from the receiver to the requestor are detailed.

We claim: 
     
         1 . An apparatus comprising:
 a requestor device to send a credit based request;   a receiver device to receive and consume the credit based request;   a delay element in a return path between the requestor and receiver devices, the delay element to delay a credit based response from the receiver to the requestor.   
     
     
         2 . The apparatus of  claim 1 , wherein the requestor device is a physical processor core. 
     
     
         3 . The apparatus of  claim 1 , wherein receiver device is a cache memory device. 
     
     
         4 . The apparatus of  claim 4 , wherein the cache memory device is a last level cache. 
     
     
         5 . The apparatus of  claim 4 , wherein the cache memory device is an intermediate level of cache of a cache hierarchy. 
     
     
         6 . The apparatus of  claim 1 , wherein the delay element comprises:
 storage for a class of service (CLOS) to delay value mapping; and   a selector to select a delay value from the mapping based upon a CLOS received from the requestor device.   
     
     
         7 . The apparatus of  claim 6 , wherein the delay element further comprises:
 a delay state machine to enforce one of a plurality of delay algorithms.   
     
     
         8 . The apparatus of  claim 1 , wherein the requestor device comprises:
 a logical processor including storage for a class of service; and   a hardware core to execute instructions associated with the logical processor.   
     
     
         9 . A method comprising:
 receiving a credit return at a delay element;   determining an amount of delay to apply to the credit return;   delaying the credit return by the delay amount;   transmitting the delayed credit return to a requestor.   
     
     
         10 . The method of  claim 9 , wherein the credit return is received from a last level cache. 
     
     
         11 . The method of  claim 9 , wherein the credit return is received from an intermediate level of cache. 
     
     
         12 . The method of  claim 9 , wherein the delay amount is determined from a class of service to delay amount mapping stored in the delay element. 
     
     
         13 . The method of  claim 12 , further comprising:
 receiving the class of service from the requestor.   
     
     
         14 . The method of  claim 12 , further comprising:
 configuring the delay element to utilize one of plurality of delay algorithms.   
     
     
         15 . The method of  claim 9 , wherein requestor is a physical processor core. 
     
     
         16 . The method of  claim 9 , further comprising:
 starting a tracker to track a number of credits used by a requestor; and   dynamically tracking the number of credits used by the requestor, wherein the credit return is delayed until the number of credits used by the requestor is less than a threshold.   
     
     
         17 . The method of  claim 9 , wherein the delay amount for a particular requestor is tied to a bandwidth associated with a class of service. 
     
     
         19 . The apparatus of  claim 3 , wherein the cache memory device is an a hierarchy not having a last-level cache.