US2016313713A1PendingUtilityA1
Dimming Control Including an Adjustable Output Response
Est. expirySep 5, 2032(~6.2 yrs left)· nominal 20-yr term from priority
H05B 47/18G05B 2219/25401G05B 11/012H05B 39/044G05B 19/042H05B 47/19H05B 37/0272H05B 37/0254H02J 3/14Y02B70/3225Y02B70/30Y04S20/222Y04S20/246Y02B20/00
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Claims
Abstract
The present disclosure provides improved dimming or dimmer assemblies/modules for controlling lights or loads (e.g., as part of a control or automation system). More particularly, the present disclosure provides for systems and methods for utilizing dimmer control assemblies/modules advantageously having: (i) an adjustable output response, (ii) enhanced thermal management, (iii) a voltage detector to determine amplitude and zero-crossing, and/or (iv) an estimation of power consumption for multiple loads (e.g., using a single sensor).
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A control assembly comprising:
a first load circuit, the first load circuit including a first load control device, a second load control device, a first current detector and a first voltage detector, the first load control device in communication with a first controlled device and the second load control device in communication with a second controlled device; a processor in communication with the first and second load control devices, the first current detector and the first voltage detector; and a first line feed associated with the first load circuit and in communication with the first and second load control devices, the first current detector and the first voltage detector; wherein at least a portion of the first line feed is configured to travel to and be output by the first load control device as a first load output to the first controlled device; wherein at least a portion of the first line feed is configured to travel to and be output by the second load control device as a second load output to the second controlled device; wherein the first voltage detector includes an analog-to-digital converter, the analog-to-digital converter adapted to take a plurality of measurements of the voltage that is present at the analog-to-digital input during each cycle of the first line feed; wherein the analog-to-digital converter is adapted to communicate the measurements to the processor, the processor adapted to group the measurements into separate groups of measurements; wherein the processor is adapted to calculate the average voltage measurement of each group and determine if the average voltage measurement is positive or negative; wherein the processor is adapted to identify and analyze together consecutive groups of voltage measurements that have opposite positive/negative average voltage measurement values to estimate the voltage zero-crossing point of the first line feed's waveform.
2 . The assembly of claim 1 , wherein each group of voltage measurements includes about twelve consecutive voltage measurements, each voltage measurement of each group taken about every 63 μs.
3 . The assembly of claim 1 , wherein when the processor analyzes the consecutive groups of voltage measurements that have opposite positive/negative average voltage measurement values, the processor is adapted to draw lines between pairs of individual voltage measurement points from each group to estimate the voltage zero-crossing point of the first line feed's waveform.
4 . The assembly of claim 3 , wherein each group of voltage measurements includes about twelve consecutive voltage measurements;
wherein the processor is adapted to draw lines between pairs of individual voltage measurement points from each group by first drawing a line between the first measurement point of the first group and the first measurement point of the second group, then drawing a line between the second measurement point of the first group and the second measurement point of the second group, then drawing a line between the third measurement point of the first group and the third measurement point of the second group, then drawing a line between the fourth measurement point of the first group and the fourth measurement point of the second group, then drawing a line between the fifth measurement point of the first group and the fifth measurement point of the second group, then drawing a line between the sixth measurement point of the first group and the sixth measurement point of the second group, then drawing a line between the seventh measurement point of the first group and the seventh measurement point of the second group, then drawing a line between the eighth measurement point of the first group and the eighth measurement point of the second group, then drawing a line between the ninth measurement point of the first group and the ninth measurement point of the second group, then drawing a line between the tenth measurement point of the first group and the tenth measurement point of the second group, then drawing a line between the eleventh measurement point of the first group and the eleventh measurement point of the second group, and then drawing a line between the twelfth measurement point of the first group and the twelfth measurement point of the second group.
5 . The assembly of claim 4 , wherein after each line has been drawn between pairs of individual voltage measurement points, the processor is adapted to determine the voltage zero-crossing point of each drawn line and estimate the voltage zero-crossing point of the first line feed's waveform by analyzing the voltage zero-crossing point of each drawn line.
6 . The assembly of claim 5 , wherein the processor analyzes the median value of the voltage zero-crossing points of all the drawn lines to estimate the voltage zero-crossing point of the first line feed's waveform.Cited by (0)
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