US2016322101A1PendingUtilityA1
Resistive Switching Element and Use Thereof
Assignee: ECOLE POLYTECHNIQUE FED DE LAUSANNE (EPFL)Priority: Aug 3, 2012Filed: Jun 24, 2016Published: Nov 3, 2016
Est. expiryAug 3, 2032(~6 yrs left)· nominal 20-yr term from priority
Inventors:Davide SacchettoShashi Kanth BobbaPierre-Emmanuel GaillardonYusuf LeblebiciGiovanni De MicheliTugba Demirci
G11C 13/0007H01L 45/1625H01L 45/1608H01L 27/2436G11C 2013/0045G11C 13/0069G11C 13/004H01L 45/1233H03K 17/6257H01L 45/12H01L 45/1253H01L 45/146H01L 45/08G11C 13/0064G11C 11/56G11C 13/0026G11C 2013/0073G11C 2213/56G11C 2213/72G11C 13/0028H10N 70/026H10N 70/24H10N 70/801H10N 70/021H10N 70/841H10B 63/80H10N 70/8833H10N 70/826H10B 63/30H10N 70/023
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Claims
Abstract
A bipolar resistive switching device including an electrically conductive bottom electrode, a stack of transition metal oxides layers, a number of transition metal oxide layers being equal or greater than 2, the stack including: at least one MOx layer, at least one oxygen gettering layer NOy, wherein the resistive switching device further includes an electrically conductive top electrode.
Claims
exact text as granted — not AI-modified1 - 6 (canceled)
7 . A process for manufacturing a bipolar resistive switching device comprising steps of:
creating a bottom electrode from an electrically conductive material; creating a top electrode from an electrically conductive material; and creating a stack of transition metal oxide layers sandwiched in between the top electrode and the bottom electrode, a number of transition metal oxide layers being equal or greater than 2, the stack comprising at least one MO x layer, and at least one oxygen gettering layer NO N .
8 . The process of claim 7 wherein the oxygen gettering layer comprises a transition metal oxide NO N , wherein the metal N includes at least one member of a group consisting of: Cr, Ti, Hf, and Nb.
9 . The process of claim 7 , wherein the metal M includes at least one member of a group consisting of: Cr, Ti, Hf, Ta, and Nb.
10 . The process of claim 7 , further comprising a step of:
creating at least one layer of metal to be included in the stack of transition metal oxide layers.
11 . The process of claim 7 , wherein
the step of creating the electrically conductive bottom electrode includes starting from an electrically insulated Si substrate, and depositing the bottom electrode (BE) lines with a lift-off method, the step of creating the stack of metal oxide layers includes, depositing the MO x layer by means of sputtering from a MO z target, values of the stochiometric number z are in the range 0≦z≦2.5, and evaporating a metallic N layer to form the oxygen gettering NO y layer at the interface between N and TaO x , and the step of creating the electrically conductive top electrode includes starting from the metal oxide layer, and depositing the top electrode lines with a lift-off method.
12 . The process of claim 7 wherein a value of the stochiometric number y is in the range 0<y≦2.
13 . The process of claim 7 , wherein values of the stochiometric number x are in the range 0<x≦2.5.
14 . The process of claim 7 for which the electrically conductive electrodes in the steps of creating the bottom electrode, and creating the top electrode, and the metal oxide layers in the step of creating the metal oxide layers stack, are obtained by deposition steps which correspond to at least one of the following:
sputtering deposition;
evaporation method; and
atomic layer deposition.
15 . The process of claim 7 , wherein
the step of creating the stack of metal oxide layers comprises: depositing the MO x layer by sputtering from a MO z target, values of the stochiometric number z are in the range of 0≦z≦2.5, and evaporating a metallic N layer to form the oxygen gettering NO y layer at the interface between N and TaO x , and the step of creating the electrically conductive top electrode includes starting from the metal oxide layer, and depositing the top electrode lines with a lift-off method.
16 . The process of claim 15 , wherein the step of creating the electrically conductive bottom electrode comprises:
depositing bottom electrode lines starting from a CMOS circuit.
17 . The process of claim 15 , wherein the step of creating the electrically conductive bottom electrode comprises:
starting from a CMOS circuit, the CMOS circuit including conductive electrode lines which are used as the electrically conductive bottom electrode.
18 . The process of claim 15 , wherein the step of creating the electrically conductive bottom electrode comprises:
depositing bottom electrode lines starting from an electrically insulated Si substrate.
19 . The process of claim 15 , wherein the step of creating the electrically conductive bottom electrode comprises:
starting from an electrically insulated Si substrate, the electrically insulated Si substrate including conductive electrode lines which are used as the electrically conductive bottom electrode.
20 . (canceled)
21 . A multiplexer circuit comprising:
a plurality of bipolar resistive switching devices and transistors, wherein the bipolar resistive switching devices serve as routing switching, and wherein transistors are configured to program the multiplexer circuit.
22 . A read/write circuit comprising:
a digital controller that has a digital state machine configured to control write operation according to a protocol; an analog read circuitry including,
a high gain differential amplifier,
a current comparator,
a current calibration circuitry designed for a column,
a high gain operational amplifier,
a voltage comparator, and
a voltage calibration circuitry;
a further analog read circuitry to set each un-selected row voltage to a same voltage level as the column voltage levels; a reference voltage generation block controlled by the digital controller to keep the row and column voltage levels at sufficient voltage levels in order to program a Resistive Switching Material element contents with minimum current consumption; and column and row decoders controlled by the digital controller to select an appropriate voltage level on the selected row and selected column.
23 . The read/write circuit of claim 22 ,
wherein a sequence of write operations is applied and verified by a sequence of read operations to ensure that a specific resistive switching material stores a specific resistance state.
24 . (canceled)Join the waitlist — get patent alerts
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