System and methods of reducing energy consumption by synchronizing sensors

Abstract

Disclosed aspects relate to methods and apparatus for correcting a first sensor clock of a first sensor. The disclosed methods and apparatus effectuate receiving first and seconds signals in a sensor from a processor at known different times related to the timing of the processor clock. Based on the measured time interval between the times of the first and second signals as determined by the sensor, a clock correction factor may be determined in the sensor for correcting the timing of the sensor clock to be synchronized with the processor clock.

What is claimed is: 
     
         1 . A method for correcting a sensor clock of a sensor, comprising:
 receiving a first signal at a first time in a first sensor from a processor interfaced with the first sensor, the first time of the first signal related to timing of a processor clock of the processor;   receiving a second signal at a second time in the first sensor from the processor, the second time of second signal related to timing of the processor clock of the processor;   deriving a first clock correction factor in the first sensor based on a time interval between the first time and the second time as measured at the first sensor; and   applying the first clock correction factor in a first sensor clock of the first sensor to correct timing of the first sensor clock with respect to the processor clock.   
     
     
         2 . The method of  claim 1 , wherein deriving the clock correction factor further comprises:
 comparing the time interval between the first and second times as measured in the sensor with the first sensor clock with a predetermined time interval at which the processor is known to transmit the first and second signals; and   using a difference between the measured time interval and the predetermined time interval when deriving the first clock correction factor.   
     
     
         3 . The method of  claim 1 , wherein the predetermined time interval is equal to a shortest sensor sampling period among a plurality of sensors present in a system. 
     
     
         4 . The method of  claim 1 , wherein the first and second signals are received over an interface comprising at least one of a dedicated line, a Data Ready Interrupt (DRI) line, an I 2 C bus, a Serial Data (SDA) line, a Serial Clock (SCL) line, a Serial Peripheral Interface (SPI) bus, a universal asynchronous receiver/transmitter (UART) connection, or another data connection interface configured for providing bi-directional communication between the processor and the first sensor. 
     
     
         5 . The method of  claim 1 , further comprising:
 receiving the first signal in a second sensor at the first time from the processor interfaced with the second sensor, the first time of the first signal related to timing of the processor clock of the processor;   receiving the second signal in the second sensor at the second time the second time of second signal related to timing of the processor clock of the processor;   deriving a second clock correction factor in the second sensor based on a time interval between the first time and the second time as measured at the second sensor; and   applying the second clock correction factor in a second sensor clock of the second sensor to correct timing of the second sensor clock with respect to the processor clock;   wherein the correction of the first sensor clock and the correction of the second sensor clock takes place simultaneously, and the time interval is a common multiple of a sampling period of the first sensor and a sampling period of the second sensor.   
     
     
         6 . The method of  claim 1 , wherein the first sensor clock is aligned with the processor clock over the time interval due to applying the correction factor and polling of the first sensor at a polling frequency as measured by the processor clock coincides with a specified sampling frequency of the first sensor resulting in every data sample of the firm sensor being read exactly once over the time interval. 
     
     
         7 . The method of  claim 1 , further comprising:
 transmitting timing information related to the first sensor clock from the first sensor to the processor;   receiving information in the first sensor from the processor including a processor computed clock correction factor determined by the processor based on the transmitted timing information related to the first sensor clock; and   applying the processor computed clock correction factor instead of the first clock correction factor in the first sensor clock of the first sensor to correct timing of the first sensor clock with respect to the processor clock.   
     
     
         8 . The method of  claim 7 , wherein the transmitted timing information related to the first sensor clock includes first and second pulses spaced by another time interval as measured by the first sensor clock, wherein the first and second pulses are configured to be usable by the processor to determine the processor computed clock correction factor by comparing the duration of the another time interval to a predetermined time interval known at the processor. 
     
     
         9 . A computing system comprising:
 a first sensor including a first sensor clock;   a processor including a processor clock; and   an interface communicatively coupling the first sensor and the processor;
 wherein the processor is configured to transmit a first signal to the first sensor and a second signal to the first signal at a time separated by a predetermined time interval, the transmission times of the first and second signals related to timing of a processor clock of the processor; and 
 wherein the first sensor is configured to:
 receive the first and second signals at respective first and second times; 
 derive a first clock correction factor in the first sensor based on a measured time interval between the first time and the second time as measured by the first sensor; and 
 apply the first clock correction factor in a first sensor clock of the first sensor to correct timing of the first sensor clock with respect to the processor clock. 
 
   
     
     
         10 . The system of  claim 9 , wherein deriving the clock correction factor further comprises:
 comparing the measured time interval between the first and second times as measured in the sensor with the first sensor clock with the predetermined time interval at which the processor is known to transmit the first and second signals; and   using a difference between the measured time interval and the predetermined time interval when deriving the first clock correction factor.   
     
     
         11 . The system of  claim 9 , wherein the predetermined time interval is equal to a shortest sensor sampling period among a plurality of sensors present in a system. 
     
     
         12 . The system of  claim 9 , wherein the first and second signals are received over an interface comprising at least one of a dedicated line, a Data Ready interrupt (DRI) line, I 2 C bus, a Serial Data (SDA) line, a Serial Clock (SCL) line, a Serial Peripheral Interface (SPI) bus, a universal asynchronous receiver/transmitter (UART) connection, or another data connection interface configured for providing bi-directional communication between the processor and the first sensor. 
     
     
         13 . The system of  claim 9 , further comprising:
 a second sensor including a second sensor clock, the second sensor communicatively coupled to the processor by the interface;   wherein the second sensor is configured to:
 receive the first signal in a second sensor at the first time from the processor interfaced with the second sensor, the first time of the first signal related to timing of the processor clock of the processor 
 receive the second signal in the second sensor at the second time the second time of second signal related to timing of the processor clock of the processor; 
 derive a second clock correction factor in the second sensor based on a time interval between the first time and the second time as measured at the second sensor; and 
 apply the second clock correction factor in a second sensor clock of the second sensor to correct timing of the second sensor clock with respect to the processor clock; 
   wherein the correction of the first sensor clock and the correction of the second sensor clock takes place simultaneously, and the time interval is a common multiple of a sampling period of the first sensor and a sampling period of the second sensor.   
     
     
         14 . The system of  claim 9 , wherein the first sensor clock is aligned with the processor clock over the time interval due to applying the correction factor and polling of the first sensor at a polling frequency as measured by the processor clock coincides with a specified sampling frequency of the first sensor resulting in every data sample of the first sensor being read exactly once over the time interval. 
     
     
         15 . The system of  claim 9 , further comprising:
 the first sensor configured to transmit timing information related to the first sensor clock from the first sensor to the processor via the interface;   the processor configured to derive a processor computed clock correction factor based on the timing information transmitted by the first sensor and transmit the processor computed clock correction factor to the first sensor via the interface; and   the first sensor further configured to apply the processor computed clock correction factor instead of the first clock correction factor in the first sensor clock of the first sensor to correct timing of the first sensor clock with respect to the processor clock.   
     
     
         16 . The system of  claim 15 , wherein the transmitted timing information related to the first sensor clock includes first and second pulses spaced by another time interval as measured by the first sensor clock, wherein the first and second pulses are configured to be usable by the processor to determine the processor computed clock correction factor by comparing the duration of the another time interval to a predetermined time interval known at the processor. 
     
     
         17 . A computing device, comprising:
 means for receiving a first signal at a first time in a first sensor from a processor interfaced with the first sensor, the first time of the first signal related to timing of a processor clock of the processor;   means for receiving a second signal at a second time in the first sensor from the processor, the second time of second signal related to timing of the processor clock of the processor;   means for deriving a first clock correction factor in the first sensor based on a time interval between the first time and the second time as measured at the first sensor; and   means for applying the first clock correction factor in a first sensor clock of the first sensor to correct timing of the first sensor clock with respect to the processor clock.   
     
     
         18 . The computing device of  claim 17 , wherein the means for deriving the clock correction factor further comprises:
 means for comparing the time interval between the first and second times as measured in the sensor with the first sensor clock with a predetermined time interval at which the processor is known to transmit the first and second signals; and   means for using a difference between the measured time interval and the predetermined time interval when deriving the first clock correction factor.   
     
     
         19 . The computing device of  claim 17 , wherein the predetermined time interval is equal to a shortest sensor sampling period among a plurality of sensors present in a system. 
     
     
         20 . The computing device of  claim 17 , wherein the first and second signals are received over an interface comprising at least one of a dedicated line, a Data Ready Interrupt (DRI) line, an I 2 C bus, a Serial Data (SDA) line, a Serial Clock (SCL) line, a Serial Peripheral interface (SPI) bus, a universal asynchronous receiver/transmitter (UART) connection, or another data connection interface configured for providing bi-directional communication between the processor and the first sensor. 
     
     
         21 . The computing device of  claim 17 , further comprising:
 means for receiving the first signal in a second sensor at the first time from the processor interfaced with the second sensor, the first time of the first signal related to timing of the processor clock of the processor,   means for receiving the second signal in the second sensor at the second time the second time of second signal related to timing of the processor clock of the processor;   means for deriving a second clock correction factor in the second sensor based on a time interval between the first time and the second time as measured at the second sensor; and   applying the second clock correction factor in a second sensor clock of the second sensor to correct timing of the second sensor clock with respect to the processor clock;   wherein the correction of the first sensor clock and the correction of the second sensor clock takes place simultaneously, and the time interval is a common multiple of a sampling period of the first sensor and a sampling period of the second sensor.   
     
     
         22 . The computing device of  claim 17 , wherein the first sensor clock is aligned with the processor clock over the time interval due to applying the correction factor and polling of the first sensor at a polling frequency as measured by the processor clock coincides with a specified sampling frequency of the first sensor resulting in every data sample of the first sensor being read exactly once over the time interval. 
     
     
         23 . The computing device of  claim 17 , further comprising:
 means for transmitting timing information related to the first sensor clock from the first sensor to the processor;   means for receiving information in the first sensor from the processor including a processor computed clock correction factor determined by the processor based on the transmitted timing information related to the first sensor clock; and   means for applying the processor computed clock correction factor instead of the first clock correction factor in the first sensor clock of the first sensor to correct timing of the first sensor clock with respect to the processor clock.   
     
     
         24 . The computing device of  claim 23 , wherein the transmitted timing information related to the first sensor clock includes first and second pulses spaced by another time interval as measured by the first sensor clock, wherein the first and second pulses are configured to be usable by the processor to determine the processor computed clock correction factor by comparing the duration of the another time interval to a predetermined time interval known at the processor, 
     
     
         25 . A non-transitory computer-readable medium including code which, when executed by a processor, causes the processor to perform a method comprising:
 receiving a first signal at a first time in a first sensor from a processor interfaced with the first sensor, the first time of the first signal related to timing of a processor clock of the processor;   receiving a second signal at a second time in the first sensor from the processor, the second time of second signal related to timing of the processor clock of the processor;   deriving a first clock correction factor in the first sensor based on a time interval between the first time and the second time as measured at the first sensor; and   applying the first clock correction factor in a first sensor clock of the first sensor to correct timing of the first sensor clock with respect to the processor clock.   
     
     
         26 . The non-transitory computer-readable medium of  claim 25 , wherein the code which, when executed by the processor, further causes the processor to perform a method comprising deriving the clock correction factor by comparing the time interval between the first and second times as measured in the sensor with the first sensor clock with a predetermined time interval at which the processor is known to transmit the first and second signals; and using a difference between the measured time interval and the predetermined time interval when deriving the first clock correction factor. 
     
     
         27 . The non-transitory computer-readable medium of  claim 25 , wherein the predetermined time interval is equal to a shortest sensor sampling period among a plurality of sensors present in a system. 
     
     
         28 . The non-transitory computer-readable medium of  claim 25 , wherein the code further causes the processor to perform a method comprising:
 receiving the first signal in a second sensor at the first time from the processor interfaced with the second sensor, the first time of the first signal related to timing of the processor clock of the processor;   receiving the second signal in the second sensor at the second time the second time of second signal related to timing of the processor clock of the processor;   deriving a second clock correction factor in the second sensor based on a time interval between the first time and the second time as measured at the second sensor; and   applying the second clock correction factor in a second sensor clock of the second sensor to correct timing of the second sensor clock with respect to the processor clock;   wherein the correction of the first sensor clock and the correction of the second sensor clock takes place simultaneously, and the time interval is a common multiple of a sampling period of the first sensor and a sampling period of the second sensor.   
     
     
         29 . The non-transitory computer-readable medium of  claim 25 , wherein the first sensor clock is aligned with the processor clock over the time interval due to applying the correction factor and polling of the first sensor at a polling frequency as measured by the processor clock coincides with a specified sampling frequency of the first sensor resulting in every data sample of the first sensor being read exactly once over the time interval. 
     
     
         30 . The non-transitory computer-readable medium of  claim 25 , further including code which, when executed by the processor, causes the processor to perform a method comprising:
 transmitting timing information related to the first sensor clock from the first sensor to the processor;   receiving information in the first sensor from the processor including a processor computed clock correction factor determined by the processor based on the transmitted timing information related to the first sensor clock; and   applying the processor computed clock correction factor instead of the first clock correction factor in the first sensor clock of the first sensor to correct timing of the first sensor clock with respect to the processor clock.