Separation of Plasma Suppression and Wafer Edge to Improve Edge Film Thickness Uniformity

Abstract

A chamber for use in implementing a deposition process includes a pedestal for supporting a semiconductor wafer. A silicon ring is disposed over the pedestal and surrounds the semiconductor wafer. The silicon ring has a ring thickness that approximates a semiconductor wafer thickness. The silicon ring has an annular width that extends a process zone defined over the semiconductor wafer to an extended process zone that is defined over the semiconductor wafer and the silicon ring. A confinement ring defined from a dielectric material is disposed over the pedestal and surrounds the silicon ring. A showerhead having a central showerhead area and an extended showerhead area is also included. The central showerhead area is substantially disposed over the semiconductor wafer and the silicon ring. The extended showerhead area is substantially disposed over the confinement ring. The annular width of the silicon ring enlarges a surface area of the semiconductor wafer that is exposed and shifts non-uniformity effects of deposition materials over the semiconductor wafer from an edge of the semiconductor wafer to an outer edge of the silicon ring.

What is claimed is: 
     
         1 . A chamber for processing a semiconductor wafer, the processing of the semiconductor wafer includes performing deposition of a material over a surface of the semiconductor wafer, the chamber comprising,
 a pedestal for supporting the semiconductor wafer;   a silicon ring surrounding the semiconductor wafer and disposed over the pedestal, the silicon ring having a ring thickness that approximates a semiconductor wafer thickness, the silicon ring has an annular width that extends a process zone over the semiconductor wafer to an extended process zone that is over the semiconductor wafer and the silicon ring;   a confinement ring surrounding the silicon ring and disposed on the pedestal, the confinement ring being defined from a dielectric material;   a showerhead having a central showerhead area and an extended showerhead area, the central showerhead area being substantially disposed over the semiconductor wafer and the silicon ring and the extended showerhead area being substantially disposed over the confinement ring;   wherein the annular width of the silicon ring enlarges a surface area of the semiconductor wafer that is exposed to the extended process zone and shifts non-uniformity effects of deposition materials over the semiconductor wafer from an edge of the semiconductor wafer to an outer edge of the silicon ring.   
     
     
         2 . The chamber of  claim 1 , wherein the semiconductor wafer has about a 300 mm diameter, and the silicon ring extends to a diameter of about 450 mm. 
     
     
         3 . The chamber of  claim 1 , wherein the semiconductor wafer has a first standard diameter and the silicon ring extends the semiconductor wafer to a second standard diameter. 
     
     
         4 . The chamber of  claim 1 , wherein the annular width is about 75 mm. 
     
     
         5 . The chamber of  claim 1 , wherein the ring thickness of the silicon ring is between about 1.5 mm and about 2 mm. 
     
     
         6 . The chamber of  claim 1 , wherein a surface of the pedestal includes a first region with first minimum contact areas (MCAs) for supporting the semiconductor wafer, a second region with second MCAs for supporting the silicon ring, and a third region with third MCAs for supporting the confinement ring. 
     
     
         7 . The chamber of  claim 1 , wherein the silicon ring exhibits electrical properties that is similar to the semiconductor wafer. 
     
     
         8 . The chamber of  claim 1 , wherein the silicon ring is disposed over the pedestal such that an inner edge of the silicon ring is adjacent to an outer edge of the semiconductor wafer. 
     
     
         9 . The chamber of  claim 1 , wherein the pedestal is connected to a radio frequency (RF) power source through a match network and the showerhead is electrically grounded, the RF power source providing power to generate a plasma within the chamber. 
     
     
         10 . The chamber of  claim 1 , wherein the showerhead is connected to a radio frequency (RF) power source through a match network and the pedestal is electrically grounded, the RF power source providing power to generate a plasma within the chamber. 
     
     
         11 . The chamber of  claim 1 , wherein the silicon ring is disposed on the pedestal to define a gap between an outer edge of the semiconductor wafer and an inner edge of the silicon ring, the gap is between about 0.25 mm and about 1.0 mm. 
     
     
         12 . The chamber of  claim 1 , wherein the silicon ring includes a step, the step defined by a top surface, a sidewall and a bottom surface, the bottom surface configured to support the semiconductor wafer during transition from one processing station to another processing station within the chamber, a height of the sidewall approximating the semiconductor wafer thickness. 
     
     
         13 . A chamber for processing a semiconductor wafer, the processing of the semiconductor wafer includes performing deposition of a material over a surface of the semiconductor wafer, the chamber comprising,
 a carrier wafer including an annular ring surface and a pocket, the pocket being defined in a center of the carrier wafer and including a step, the annular ring surface is defined to surround the pocket and extend from an outer edge of the carrier wafer to a top edge of the step, a bottom surface of the step used to support the semiconductor wafer, a height of the step approximating a thickness of the semiconductor wafer, the annular ring surface of the carrier wafer extends a process zone that is defined over the semiconductor wafer to an extended process zone that is defined over the annular ring surface of the carrier wafer;   a pedestal for supporting the carrier wafer;   a confinement ring surrounding the carrier wafer and disposed on the pedestal, the confinement ring being defined from a dielectric material; and   a showerhead having a central showerhead area and an extended showerhead area, the central showerhead area being substantially disposed over the carrier wafer and the extended showerhead area being substantially disposed over the confinement ring;   wherein the annular ring surface of the carrier wafer enlarges a surface area of the semiconductor wafer that is exposed to the extended process zone and shifts non-uniformity effects of deposition materials over the semiconductor wafer from an edge of the semiconductor wafer to the outer edge of the carrier wafer.   
     
     
         14 . The chamber of  claim 13 , wherein the semiconductor wafer received in the pocket has about a 300 mm diameter, and the annular ring surface of the carrier wafer extends the carrier wafer to a diameter of about 450 mm. 
     
     
         15 . The chamber of  claim 13 , wherein the semiconductor wafer has a first standard diameter and the carrier wafer extends the semiconductor wafer to a second standard diameter. 
     
     
         16 . The chamber of  claim 13 , wherein the width of the annular ring surface is about 75 mm. 
     
     
         17 . The chamber of  claim 13 , wherein the height of the step is about 0.79 mm. 
     
     
         18 . The chamber of  claim 13 , wherein a top surface of the pedestal includes a first region with first minimum contact areas (MCAs) for supporting the carrier wafer and a second region with second MCAs for supporting the confinement ring. 
     
     
         19 . The chamber of  claim 13 , wherein the bottom surface of the pocket includes minimum contact areas (MCAs) for supporting the semiconductor wafer. 
     
     
         20 . The chamber of  claim 13 , wherein the pedestal is connected to a radio frequency (RF) power source through a match network and the showerhead is electrically grounded, the RF power source providing power to generate a plasma within the chamber. 
     
     
         21 . The chamber of  claim 13 , wherein the showerhead is connected to a radio frequency (RF) power source through a match network and the pedestal is electrically grounded, the RF power source providing power to generate a plasma within the chamber. 
     
     
         22 . The chamber of  claim 13 , wherein a gap is defined between an outer edge of the semiconductor wafer and the top edge of the step defined in the pocket, the gap is between about 0.25 mm and about 1.0 mm.