Hybrid polysilicon heterojunction back contact cell

Abstract

A method for manufacturing high efficiency solar cells is disclosed. The method comprises providing a thin dielectric layer and a doped polysilicon layer on the back side of a silicon substrate. Subsequently, a high quality oxide layer and a wide band gap doped semiconductor layer can both be formed on the back and front sides of the silicon substrate. A metallization process to plate metal fingers onto the doped polysilicon layer through contact openings can then be performed. The plated metal fingers can form a first metal gridline. A second metal gridline can be formed by directly plating metal to an emitter region on the back side of the silicon substrate, eliminating the need for contact openings for the second metal gridline. Among the advantages, the method for manufacture provides decreased thermal processes, decreased etching steps, increased efficiency and a simplified procedure for the manufacture of high efficiency solar cells.

What is claimed is: 
     
         1 . A solar cell, comprising:
 a silicon substrate;   a first emitter region disposed on a surface of the silicon substrate and comprising a layer of a wide band gap doped semiconductor of a first conductivity type;   a second emitter region disposed on the surface of the silicon substrate and comprising a crystalline doped silicon layer of a second conductivity type disposed on a thin dielectric layer; and   first and second contacts disposed on, and electrically connected to, the first and second emitter regions, respectively.   
     
     
         2 . The solar cell of  claim 1 , wherein the layer of the wide band gap doped semiconductor further extends over a portion of the second emitter region. 
     
     
         3 . The solar cell of  claim 2 , further comprising:
 a material layer disposed between the crystalline doped silicon layer and the portion of the wide band gap doped semiconductor extending over the portion of the second emitter region, wherein the material layer comprises dopants of the second conductivity type.   
     
     
         4 . The solar cell of  claim 3 , wherein the dopants of the second conductivity type are phosphorous dopants. 
     
     
         5 . The solar cell of  claim 3 , wherein the dopants of the second conductivity type are boron dopants. 
     
     
         6 . The solar cell of  claim 1 , wherein the wide band gap doped semiconductor is disposed on a second thin dielectric layer. 
     
     
         7 . The solar cell of  claim 1 , wherein the silicon substrate is an N-type bulk silicon. 
     
     
         8 . The solar cell of  claim 1 , further comprising:
 an anti-reflective coating on the wide band gap doped semiconductor of the first emitter region.   
     
     
         9 . The solar cell of  claim 8 , wherein the anti-reflective coating comprises silicon nitride. 
     
     
         10 . The solar cell of  claim 1 , further comprising:
 a second layer of the wide band gap doped semiconductor disposed proximate to a second surface of the silicon substrate, opposite the surface of the silicon substrate.   
     
     
         11 . The solar cell of  claim 10 , further comprising:
 an anti-reflective coating on the second layer of the wide band gap doped semiconductor.   
     
     
         12 . The solar cell of  claim 1 , wherein the wide band gap doped semiconductor has a band gap greater than 1.05 electron-Volts. 
     
     
         13 . The solar cell of  claim 1 , wherein the wide band gap doped semiconductor has a resistivity of greater than 10 ohm-cm. 
     
     
         14 . The solar cell of  claim 1 , wherein the surface of the silicon substrate comprises a texturized trench, and wherein the wide band gap doped semiconductor is formed in the texturized trench. 
     
     
         15 . A solar cell, comprising:
 a crystalline silicon substrate;   a first emitter region disposed on a surface of the silicon substrate and comprising a layer of a wide band gap negative-type doped semiconductor, wherein the wide band gap negative-type doped semiconductor has a band gap greater than 1.05 electron-Volts and has a resistivity of greater than 10 ohm-cm;   a second emitter region disposed on the surface of the crystalline silicon substrate and comprising a crystalline positive-type doped silicon layer disposed on a thin dielectric layer, wherein the layer of the wide band gap negative-type doped semiconductor further extends over a portion of the second emitter region; and   first and second contacts disposed on, and electrically connected to, the first and second emitter regions, respectively.   
     
     
         16 . The solar cell of  claim 15 , wherein the wide band gap negative-type doped semiconductor is disposed on a second thin dielectric layer. 
     
     
         17 . The solar cell of  claim 15 , wherein the surface of the crystalline silicon substrate comprises a texturized trench, and wherein the wide band gap negative-type doped semiconductor is formed in the texturized trench. 
     
     
         18 . A solar cell, comprising:
 a crystalline silicon substrate;   a first emitter region disposed on a surface of the silicon substrate and comprising a layer of a wide band gap positive-type doped semiconductor, wherein the wide band gap positive-type doped semiconductor has a band gap greater than 1.05 electron-Volts and has a resistivity of greater than 10 ohm-cm;   a second emitter region disposed on the surface of the crystalline silicon substrate and comprising a crystalline negative-type doped silicon layer disposed on a thin dielectric layer, wherein the layer of the wide band gap positive-type doped semiconductor further extends over a portion of the second emitter region; and   first and second contacts disposed on, and electrically connected to, the first and second emitter regions, respectively.   
     
     
         19 . The solar cell of  claim 18 , wherein the wide band gap positive-type doped semiconductor is disposed on a second thin dielectric layer. 
     
     
         20 . The solar cell of  claim 18 , wherein the surface of the crystalline silicon substrate comprises a texturized trench, and wherein the wide band gap positive-type doped semiconductor is formed in the texturized trench.