US2017078390A1PendingUtilityA1

Read-coherent group memory

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Assignee: LIGHTFLEET CORPPriority: Sep 10, 2015Filed: Sep 12, 2016Published: Mar 16, 2017
Est. expirySep 10, 2035(~9.2 yrs left)· nominal 20-yr term from priority
H04L 49/15H04L 67/1097H04L 12/40G06F 12/0817H04L 49/357H04L 12/1881H04L 67/1095G06F 13/4068G06F 13/28H04L 67/10G06F 3/065G06F 3/061H04L 67/104G06F 3/067H04L 12/40163
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Claims

Abstract

A data distribution system includes a data distribution module and at least two host-bus adapters coupled to the data distribution module. The data distribution system includes a memory-management system including a plurality of memory regions. The memory-management system is coherent across the plurality of memory regions and an absolute address of each of the plurality of memory regions accessed by a same offset.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method, comprising operating a data distribution system including
 initializing a memory-management system that is coherent across a plurality of memory regions; and   accessing an absolute address of each of the plurality of memory regions by a same offset.   
     
     
         2 . The method of  claim 1 , wherein the plurality of memory regions include heterogeneous memory regions. 
     
     
         3 . The method of  claim 1 , wherein the plurality of memory regions define a group memory. 
     
     
         4 . The method of  claim 1 , further comprising paging including dividing a group memory into a plurality of pages. 
     
     
         5 . A non-transitory computer readable media comprising executable programming instructions for performing the method of  claim 1 . 
     
     
         6 . An apparatus, comprising: a data distribution system including a data distribution module and at least two host-bus adapters coupled to the data distribution module, wherein the data distribution system includes a memory-management system including a plurality of memory regions,
 wherein the memory-management system is coherent across the plurality of memory regions and   wherein an absolute address of each of the plurality of memory regions accessed by a same offset.   
     
     
         7 . The apparatus of  claim 6 , wherein the plurality of memory regions include heterogeneous memory regions. 
     
     
         8 . The apparatus of  claim 6 , further comprising another data distribution module coupled to the data distribution module. 
     
     
         9 . A network, comprising the apparatus of  claim 6 . 
     
     
         10 . An interconnect fabric, comprising the apparatus of  claim 6

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