US2017103904A1PendingUtilityA1
Integrated circuit package mold assembly
Est. expiryOct 12, 2035(~9.2 yrs left)· nominal 20-yr term from priority
Inventors:Hiep Xuan Nguyen
H10W 72/0198H10W 72/884H10W 90/756H10W 90/754H10W 72/07507H10P 72/74H10W 74/114H10W 72/551H10W 70/442H10W 74/016H10P 72/0438H10W 74/014H01L 21/561H01L 21/78H01L 21/565
48
PatentIndex Score
0
Cited by
0
References
0
Claims
Abstract
An integrated circuit (“IC”) package mold includes an upper mold platen that defines an upper mold cavity for receiving an upper substrate having a die attach side with a plurality of dies mounted thereon and a non-attach side with no dies mounted thereon. The die attach side of the upper substrate faces upwardly. A lower mold platen defines a lower mold cavity for receiving a lower substrate having a die attach side with a plurality dies mounted thereon and a non-attach side with no dies mounted thereon. The die attach side of the lower substrate faces downwardly.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . An integrated circuit (“IC”) package mold assembly comprising:
an upper mold platen defining an upper mold cavity for receiving an upper substrate having a die attach side with a plurality of dies mounted thereon and a non-attach side with no dies mounted thereon, wherein said die attach side is facing upwardly; and
a lower mold platen defining a lower mold cavity for receiving a lower substrate having a die attach side with a plurality dies mounted thereon and a non-attach side with no dies mounted thereon, wherein said die attach side of said lower substrate is facing downwardly.
2 . The assembly of claim 1 wherein said upper and lower mold platens comprises at least one pair of aligned projections extending into said mold cavities for engaging said upper and lower substrates therebetween.
3 . The assembly of claim 1 further comprising a single runner in fluid communication with said upper and lower mold cavities.
4 . An integrated circuit (“IC”) package mold assembly comprising:
an upper mold platen defining an upper mold cavity;
a lower mold platen defining a lower mold cavity;
an upper substrate positioned in said upper mold cavity and having a plurality of integrally connected substrate portions, each said upper substrate portion having a die attach side and a non-attach side, IC dies being mounted on said die attach sides of said plurality of upper substrate portions; and
a lower substrate positioned in said lower mold cavity and having a plurality of integrally connected lower substrate portions, each lower substrate portion having a die attach side and a non-attach side, IC dies being mounted on said die attach sides of said plurality of lower substrate portions;
wherein said upper and lower substrates are positioned with said non-attach sides of said substrate portions thereof positioned in facing relationship.
5 . The assembly of claim 4 wherein said upper and lower substrates comprise upper and lower leadframe substrates and further comprising a liner positioned between said upper and lower leadframe substrates.
6 . The assembly of claim 4 wherein said upper and lower substrates comprises nFBGA (New Fine Pitch Ball Grid Array) substrates.
7 . The assembly of claim 4 wherein said upper and lower substrates comprises flex-tape substrates.
8 . The assembly of claim 4 wherein said upper and lower substrates have aligned holes extending therethrough.
9 . The assembly of claim 8 further comprising a liner positioned between said upper and lower substrates and having holes therein aligned with said holes in said upper and lower substrates.
10 . The assembly of claim 9 wherein each of said upper and lower substrates comprise leadframe sheet substrates with leadframe corner connection structures that connect leadframe portions on each corresponding leadframe sheet substrate;
wherein said leadframe corner connection structures have openings therein that are aligned with corresponding ones of said holes extending through said liner.
11 . The assembly of claim 8 , said upper and lower mold cavities being filled with mold compound that fills said aligned holes extending through said substrates.
12 . A method of making integrated circuit (“IC”) packages comprising:
placing first and second IC package substrates having a plurality of individual portions associated with individual IC packages in non-attach side facing, mirror image relationship;
placing the first and second substrates in a mold having upper and lower cavities with the first substrate positioned in an upper mold platen cavity and the second substrate positioned in a lower mold platen cavity that is in fluid communication with the upper mold platen cavity; and
filling the upper and lower mold cavities with molten mold compound.
13 . The method of claim 12 further comprising engaging aligned portions of the first and second IC package substrates with opposite mold platen projections.
14 . The method of claim 13 further comprising producing a plurality of holes extending through aligned portions of the first and second substrates.
15 . The method of claim 14 further comprising flowing mold compound into the mold to mold the two substrates including flowing mold compound through the plurality of holes to form connecting structures to hold the two molded substrates together.
16 . The method of claim 15 further comprising:
curing the mold compound; and
removing connecting structures holding the molded substrates together.
17 . The method of claim 16 further comprising separating the molded substrates.
18 . The method of claim 17 further comprising dicing the separated molded substrates.
19 . The method of claim 15 further comprising dicing the connected molded substrates.
20 . The method of claim 19 further comprising removing the connecting structure during said dicing.Join the waitlist — get patent alerts
Track US2017103904A1 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.