US2017125083A1PendingUtilityA1

Semiconductor memory device, method of controlling read preamble signal thereof, and data transmission system

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Assignee: LONGITUDE SEMICONDUCTOR SARLPriority: Jan 20, 2009Filed: Jan 11, 2017Published: May 4, 2017
Est. expiryJan 20, 2029(~2.5 yrs left)· nominal 20-yr term from priority
Inventors:Atsuo Koshizuka
G11C 7/22G11C 15/00G11C 15/04G11C 7/222G11C 8/18G11C 11/409G11C 11/4076G11C 7/1051G11C 11/4096G11C 7/1066G11C 7/1072G11C 11/4087
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Claims

Abstract

A system, includes a controller comprising a plurality of first external terminals configured to supply a command and an address, and communicate a data, and communicate a strobe signal related to the data; and a semiconductor memory device including a plurality of second external terminals corresponding to the plurality of first external terminals, at least one of the plurality of first external terminals and at least one of the plurality of second external terminals each being capable of supplying an information specifying a length of a preamble of the strobe signal before the semiconductor memory device communicates the data between the controller and the semiconductor memory device, the semiconductor memory device further including a preamble register configured to be capable of storing the information.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method for transferring data from a first semiconductor device to a second semiconductor device comprising:
 setting desired preamble length information in a register, wherein the desired preamble length information is a selected one of a plurality of possible preamble lengths;   providing a preamble having a duration specified by the desired preamble length information followed by a toggle signal having a burst length on a data strobe terminal of the first semiconductor device;   providing data in synchronization with the toggle signal on a data terminal of the first semiconductor device;   receiving the preamble and the toggle signal on a data strobe terminal of the second semiconductor device; and   receiving the data on a data terminal of the second semiconductor device.

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