Method and apparatus for performance efficient isa virtualization using dynamic partial binary translation
Abstract
Methods, apparatus and systems for virtualization of a native instruction set are disclosed. Embodiments include a processor core executing the native instructions and a second core, or alternatively only the second processor core consuming less power while executing a second instruction set that excludes portions of the native instruction set. The second core's decoder detects invalid opcodes of the second instruction set. A microcode layer disassembler determines if opcodes should be translated. A translation runtime environment identifies an executable region containing an invalid opcode, other invalid opcodes and interjacent valid opcodes of the second instruction set. An analysis unit determines an initial machine state prior to execution of the invalid opcode. A partial translation of the executable region that includes encapsulations of the translations of invalid opcodes and state recoveries of the machine states is generated and saved to a translation cache memory.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A computing system comprising:
an addressable memory to store a first executable thread portion encoded in a first instruction set; and a multiprocessor including:
a first heterogeneous processor core to execute the first instruction set; and
a second heterogeneous processor core having a second instruction set excluding a portion of the first instruction set, the second heterogeneous processor core including:
an instruction decoder to receive an executable thread portion, and detect an invalid opcode;
a translation runtime environment to:
generate a partial translation of an executable region containing the invalid opcode, the partial translation including at least an encapsulation of a binary translation of the invalid opcode and a state recovery mechanism of said first machine state, and
store an indicator of the partial translation associated with the invalid opcode; and
a translation cache memory to store the partial translation.Cited by (0)
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