US2017141256A1PendingUtilityA1

Multi-junction optoelectronic device with group iv semiconductor as a bottom junction

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Assignee: ALTA DEVICES INCPriority: Oct 23, 2009Filed: Jan 26, 2017Published: May 18, 2017
Est. expiryOct 23, 2029(~3.3 yrs left)· nominal 20-yr term from priority
Y02E10/544Y02E10/547H01L 31/02363H01L 31/02167H01L 31/0735H01L 31/184H01L 31/0725H10H 20/824H10H 20/811H10H 20/80H10F 77/122H10F 71/139H10F 10/1425H10F 71/127
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Claims

Abstract

A multi-junction optoelectronic device and method of manufacture are disclosed. The method comprises providing a first p-n structure on a substrate, wherein the first p-n structure comprises a first base layer of a first semiconductor with a first bandgap such that a lattice constant of the first semiconductor matches a lattice constant of the substrate, and wherein the first semiconductor comprises a Group III-V semiconductor. The method includes providing a second p-n structure, wherein the second p-n structure comprises a second base layer of a second semiconductor with a second bandgap, wherein a lattice constant of the second semiconductor matches a lattice constant of the first semiconductor, and wherein the second semiconductor comprises a Group IV semiconductor. The method also includes lifting off the substrate the multi-junction optoelectronic device having the first p-n structure and the second p-n structure, wherein the multi-junction optoelectronic device is a flexible device.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method for fabricating a multi-junction optoelectronic device, the method comprising:
 providing a first p-n structure on a substrate, wherein the first p-n structure comprises a first base layer of a first semiconductor with a first bandgap such that a lattice constant of the first semiconductor matches a lattice constant of the substrate, and wherein the first semiconductor comprises a Group III-V semiconductor;   providing a second p-n structure on the first p-n structure, wherein the second p-n structure comprises a second base layer of a second semiconductor with a second bandgap, wherein a lattice constant of the second semiconductor matches the lattice constant of the first semiconductor, and wherein the second semiconductor comprises a Group IV semiconductor; and   lifting the multi-junction optoelectronic device off the substrate,   wherein the multi-junction optoelectronic device comprises the first p-n structure and the second p-n structure.   
     
     
         2 . The method of  claim 1 , wherein the multi-junction optoelectronic device is a flexible device. 
     
     
         3 . The method of  claim 1 , wherein the substrate comprises a GaAs wafer. 
     
     
         4 . The method of  claim 1 , wherein there is a first tunnel junction between the first p-n structure and the second p-n structure. 
     
     
         5 . The method of  claim 1 , wherein the first semiconductor comprises one or more of GaAs, AlGaAs, InGaP, InGaAs, AlInGaP, AlInGaAs, InGaAsP, AlInGaAsP, GaN, InGaN, AlGaN, AlInGaN, GaP, alloys thereof, or derivatives thereof. 
     
     
         6 . The method of  claim 1 , wherein the second semiconductor comprises one or more of Si, Ge, C, Sn, alloys thereof, or derivatives thereof. 
     
     
         7 . The method of  claim 1 , wherein the second semiconductor has a smaller energy gap than the first semiconductor. 
     
     
         8 . The method of  claim 1 , wherein one or both of the first p-n structure or the second p-n structure comprise a physically textured surface. 
     
     
         9 . The method of  claim 8 , wherein the physically textured surface is achieved by a lattice mismatch between at least two materials in the p-n structure by using any of a Stranski-Krastanov process or a Volmer-Weber process. 
     
     
         10 . The method of  claim 1 , wherein the first p-n structure further comprises one or more p-n junctions. 
     
     
         11 . The method of  claim 1 , wherein the second p-n structure further comprises one or more p-n junctions. 
     
     
         12 . The method of  claim 1 , wherein the multi junction optoelectronic device further comprises a support layer having one or more of a dielectric layer, a semiconductor contact layer, a passivation layer, a transparent conductive oxide layer, an anti-reflective coating, a metal coating, an adhesive layer, an epoxy layer, or a plastic coating. 
     
     
         13 . The method of  claim 12 , wherein the support layer has a chemical resistance to acids used during a lift off process. 
     
     
         14 . The method of  claim 1 , wherein at least one of the first p-n structure and the second p-n structure comprises a heterojunction. 
     
     
         15 . The method of  claim 1  further comprises providing a sacrificial layer on the substrate suitable for an epitaxial liftoff process. 
     
     
         16 . The method of  claim 15 , wherein the sacrificial layer comprises AlAs. 
     
     
         17 . The method of  claim 1 , wherein the first p-n structure is provided by using an epitaxial growth process comprising one or more of:
 a metalorganic chemical vapor deposition (MOCVD) process,   a hydride vapor phase epitaxy (HVPE) process,   a molecular beam epitaxy (MBE) process,   a metalorganic vapor phase epitaxy (MOVPE or OMVPE) process,   a liquid phase epitaxy (LPE) process, or   a close-space vapor transport (CSVT) epitaxy process.   
     
     
         18 . The method of  claim 1 , wherein the second semiconductor is produced by one or more of:
 a plasma enhanced chemical vapor deposition (PECVD) process,   a physical vapor deposition (PVD) process,   an atmospheric pressure chemical vapor deposition (APCVD) process,   an atomic layer deposition (ALD) process,   an HVPE process,   an MOVPE or OMVPE process,   an MOCVD process,   a low pressure chemical vapor deposition (LPCVD) process,   a hot-wire chemical vapor deposition (HWCVD) process,   an inductively coupled plasma enhanced chemical vapor deposition (ICP-CVD) process,   or other forms of CVD.   
     
     
         19 . The method of  claim 1 , further comprising applying an epitaxial lift off (ELO) process for lifting the multi-junction optoelectronic device off the substrate. 
     
     
         20 . A multi-junction optoelectronic device comprising:
 a first p-n structure, wherein the first p-n structure comprises a first base layer of a first semiconductor with a first bandgap such that a lattice constant of the first semiconductor matches a lattice constant of a substrate, and wherein the first semiconductor comprises a Group III-V semiconductor; and   a second p-n structure formed by epitaxial growth on the first p-n structure, wherein the second p-n structure comprises a second base layer of a second semiconductor with a second bandgap, wherein a lattice constant of the second semiconductor matches a lattice constant of the first semiconductor, and wherein the second semiconductor comprises a Group IV semiconductor,   wherein the multi-junction optoelectronic device is lifted off the substrate and comprises the first p-n structure and the second p-n structure.   
     
     
         21 . The multi-junction optoelectronic device of  claim 20 , wherein the multi-junction optoelectronic device is a flexible device. 
     
     
         22 . The multi-junction optoelectronic device of  claim 20 , wherein the substrate comprises a GaAs wafer. 
     
     
         23 . The multi-junction optoelectronic device of  claim 20 , wherein there is a first tunnel junction between the first p-n structure and the second p-n structure. 
     
     
         24 . The multi-junction optoelectronic device of  claim 20 , wherein the first semiconductor comprises one or more of GaAs, AlGaAs, InGaP, InGaAs, AlInGaP, AlInGaAs, InGaAsP, AlInGaAsP, GaN, InGaN, AlGaN, AlInGaN, GaP, alloys thereof, or derivatives thereof. 
     
     
         25 . The multi-junction optoelectronic device of  claim 20 , wherein the second semiconductor comprises one or more of Si, Ge, C, Sn, alloys thereof, or derivatives thereof. 
     
     
         26 . The multi-junction optoelectronic device of  claim 20 , wherein the second semiconductor has a smaller energy gap than the first semiconductor. 
     
     
         27 . The multi-junction optoelectronic device of  claim 20 , wherein one or both of the first p-n structure and the second p-n structure comprises a physically textured surface. 
     
     
         28 . The multi-junction optoelectronic device of  claim 20 , wherein the first p-n structure further comprises one or more p-n junctions. 
     
     
         29 . The multi-junction optoelectronic device of  claim 20 , wherein the second p-n structure further comprises one or more p-n junctions. 
     
     
         30 . The multi-junction optoelectronic device of  claim 20 , wherein the multi junction optoelectronic device further comprises a support layer having one or more of a dielectric layer, a semiconductor contact layer, a passivation layer, a transparent conductive oxide layer, an anti-reflective coating, a metal coating, an adhesive layer, an epoxy layer, or a plastic coating. 
     
     
         31 . The multi-junction optoelectronic device of  claim 30 , wherein the support layer has a chemical resistance to acids used during a lift off process. 
     
     
         32 . The multi-junction optoelectronic device of  claim 20 , wherein at least one of the first p-n structure and the second p-n structure comprises a heterojunction. 
     
     
         33 . A multi-junction optoelectronic device comprising:
 a first p-n structure, wherein the first p-n structure further comprises a first p-n junction and a second p-n junction, wherein the first p-n junction comprises a first single-crystalline Group III-V semiconductor with a first bandgap such that a lattice constant of the first single-crystalline Group III-V semiconductor matches a lattice constant of a substrate; and   a second p-n structure formed by epitaxial growth on the first p-n structure, wherein the second p-n structure comprises a third p-n junction having a second single-crystalline Group IV semiconductor with a second bandgap, and wherein a lattice constant of the second single-crystalline Group IV semiconductor matches a lattice constant of the first single-crystalline Group III-V semiconductor,   wherein the multi-junction optoelectronic device is lifted off the substrate and comprises the first p-n structure and the second p-n structure.   
     
     
         34 . The multi-junction optoelectronic device of  claim 33 , wherein the multi-junction optoelectronic device is a flexible device. 
     
     
         35 . The multi-junction optoelectronic device of  claim 33 , wherein the third p-n junction of the second p-n structure comprises one or more of Si, Ge, C, Sn, alloys thereof, or derivatives thereof to form a bottom junction, away from the external light source, of the multi-junction optoelectronic device.

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