Photovoltaic cell with porous semiconductor regions for anchoring contact terminals, electrolitic and etching modules, and related production line

Abstract

A photovoltaic cell is proposed. The photovoltaic cell includes a substrate of semiconductor material, and a plurality of contact terminals each one arranged on a corresponding contact area of the substrate for collecting electric charges being generated in the substrate by the light. For at least one of the contact areas, the substrate includes at least one porous semiconductor region extending from the contact area into the substrate for anchoring the whole corresponding contact terminal on the substrate. In the solution according to an embodiment of the invention, each porous semiconductor region has a porosity decreasing moving away from the contact area inwards the substrate. An etching module and an electrolytic module for processing photovoltaic cells, a production line for producing photovoltaic cells, and a process for producing photovoltaic cells are also proposed.

What is claimed: 
     
         1 . A photovoltaic cell including a substrate of semiconductor material, a plurality of contact terminals each one arranged on a corresponding contact area of the substrate for collecting electric charges being generated in the substrate by the light, for at least one of the contact areas the substrate including at least one porous semiconductor region extending from the contact area into the substrate for anchoring the whole corresponding contact terminal on the substrate, wherein
 each porous semiconductor region has a porosity decreasing moving away from the contact area inwards the substrate.   
     
     
         2 . The photovoltaic cell according to  claim 1 , wherein the porosity decreases from 70%-90% at the contact area to 10%-30% at a maximum depth in the substrate. 
     
     
         3 . The photovoltaic cell according to  claim 1 , wherein each porous semiconductor region has a thickness lower than 1 μm, the corresponding contact terminal being penetrated inside the whole thickness of the region of porous semiconductor region. 
     
     
         4 . The photovoltaic cell according to  claim 1 , wherein each porous semiconductor region includes an external layer proximate to the corresponding contact area with decreasing porosity and an internal layer distal from the corresponding contact area with uniform porosity. 
     
     
         5 . The photovoltaic cell according to  claim 4 , wherein the porosity of the external layer decreases from a maximum value to a minimum value, and wherein the porosity of the internal layer is comprised between said maximum value and said minimum value. 
     
     
         6 . The photovoltaic cell according to  claim 4 , wherein the internal layer is thicker than the external layer. 
     
     
         7 . The photovoltaic cell according to  claim 6 , wherein a thickness of the internal layer is equal to 1.5-6 times a thickness of the external layer. 
     
     
         8 . The photovoltaic cell according to  claim 1 , wherein said at least one porous semiconductor region of each contact area is a single porous semiconductor region extending on a whole surface of the contact area with a uniform porosity throughout said surface. 
     
     
         9 . The photovoltaic cell according to  claim 1 , wherein said at least one porous semiconductor region of each contact area includes a plurality of porous semiconductor regions distributed uniformly throughout the contact area. 
     
     
         10 . The photovoltaic cell according to  claim 1 , wherein said at least one porous semiconductor region of each contact area has a porosity decreasing moving inwards the contact area from a border thereof. 
     
     
         11 . The photovoltaic cell according to  claim 10 , wherein the porosity of said at least one porous semiconductor region of each contact area decreases from a maximum value at the border thereof to a minimum value at a centre thereof equal to 10%-50% of the maximum value. 
     
     
         12 . The photovoltaic cell according to  claim 10 , wherein said at least one porous semiconductor region of each contact area includes a plurality of porous semiconductor regions decreasing in concentration and/or size moving inwards the contact area from the border thereof. 
     
     
         13 . The photovoltaic cell according to  claim 1 , wherein the substrate has a front surface for absorbing the light, said at least one contact area including at least one front contact area of the front surface for corresponding at least one front contact terminal, said at least one front contact area and said at least one front contact terminal having a flat profile. 
     
     
         14 . The photovoltaic cell according to  claim 1 , wherein the substrate has a thickness of 20-100 μm. 
     
     
         15 . A process for producing a photovoltaic cell, the process including the steps of:
 providing a substrate of semiconductor material having a front surface for absorbing the light,   forming at least one front contact terminal arranged on corresponding at least one front contact area of the front surface for collecting electric charges being generated in the substrate by the light, wherein   
       said at least one front contact area and said at least one front contact terminal have a flat profile, the step of forming at least one front contact terminal including:
 forming at least one front porous semiconductor region extending from each front contact area into the substrate for anchoring the corresponding whole front contact terminal on the substrate, and 
 chemically depositing said at least one front contact terminal. 
 
     
     
         16 . The process according to  claim 15 , wherein the step of forming at least one front contact terminal is performed at a temperature lower than 350° C. 
     
     
         17 . The process according to  claim 15 , wherein the step of forming at least one front porous semiconductor region includes:
 subjecting a front layer of the substrate corresponding to said at least one front porous semiconductor region to an anodic process in a dark condition, the front layer being silicon of the N-type with a doping concentration lower than 1·10 17  atoms/cm 3 .   
     
     
         18 . The process according to  claim 17 , wherein the dark condition is lower then 2 lux. 
     
     
         19 . The process according to  claim 15 , including:
 performing a rapid thermal annealing process at a temperature lower than 350° C. after the step of chemically depositing said at least one front contact terminal.   
     
     
         20 . The process according to  claim 15 , wherein the step of forming at least one front porous semiconductor region includes:
 forming each front porous semiconductor region with a porosity decreasing moving away from the corresponding front contact area inwards the substrate.   
     
     
         21 . The process according to  claim 20 , wherein the step of forming at least one front porous semiconductor region includes:
 forming each front porous semiconductor region with the porosity decreasing from 70%-90% at the corresponding front contact area to 10%-30% at a maximum depth in the substrate.   
     
     
         22 . The process according to  claim 20 , including:
 forming each front porous semiconductor region with a thickness lower than 1 μm, and   chemically depositing each front contact terminal to penetrate inside the whole thickness of the corresponding front region of porous semiconductor region.   
     
     
         23 . The process according to  claim 20 , wherein the step of forming at least one front porous semiconductor region includes:
 forming each front porous semiconductor region to include an external layer proximate to the corresponding front contact area with decreasing porosity and an internal layer distal from the corresponding front contact area with uniform porosity.   
     
     
         24 . The process according to  claim 23 , wherein the step of forming at least one front porous semiconductor region includes:
 forming each front porous semiconductor region with the porosity of the external layer decreasing from a maximum value to a minimum value and with the porosity of the internal layer comprised between said maximum value and said minimum value.   
     
     
         25 . The process according to  claim 23 , wherein the step of forming at least one front porous semiconductor region includes:
 forming each front porous semiconductor region with the internal layer thicker than the external layer.   
     
     
         26 . The process according to  claim 25 , wherein the step of forming at least one front porous semiconductor region includes:
 forming each front porous semiconductor region with a thickness of the internal layer equal to 1.5-6 times a thickness of the external layer.   
     
     
         27 . The process according to  claim 15 , wherein the step of forming at least one front porous semiconductor region includes:
 forming said at least one front porous semiconductor region of each front contact area as a single front porous semiconductor region extending on a whole surface of the front contact area with a uniform porosity throughout said surface.   
     
     
         28 . The process according to  claim 15 , wherein the step of forming at least one front porous semiconductor region includes:
 forming said at least one front porous semiconductor region of each front contact area to include a plurality of front porous semiconductor regions distributed uniformly throughout the front contact area.   
     
     
         29 . The process according to  claim 15 , wherein the step of forming at least one front porous semiconductor region includes:
 forming said at least one front porous semiconductor region of each front contact area with a porosity decreasing moving inwards the front contact area from a border thereof.   
     
     
         30 . The process according to  claim 29 , wherein the step of forming at least one front porous semiconductor region includes:
 forming said at least one front porous semiconductor region of each front contact area with the porosity decreasing from a maximum value at the border thereof to a minimum value at a center thereof equal to 10%-50% of the maximum value.   
     
     
         31 . The process according to  claim 29 , wherein the step of forming at least one front porous semiconductor region includes:
 forming said at least one front porous semiconductor region of each front contact area to include a plurality of front porous semiconductor regions decreasing in concentration and/or size moving inwards the front contact area from the border thereof.   
     
     
         32 . The process according to  claim 15 , wherein the substrate has a back surface opposite the front surface, the process including:
 forming at least one back contact terminal arranged on a back contact area of the back surface for collecting the electric charges, the step of forming at least one back contact terminal including:
 forming at least one back porous semiconductor region extending from each back contact area into the substrate for anchoring the corresponding whole back contact terminal on the substrate, and 
 chemically depositing said at least one back contact terminal. 
   
     
     
         33 . The process according to  claim 15 , wherein the step of providing a substrate includes;
 providing the substrate has a thickness of 20-100 μm.