Microphone circuit assembly and system with speech recognition

Abstract

The present invention relates in one aspect to a microphone circuit assembly for an external application processor such as a programmable Digital Signal Processor. The microphone circuit assembly comprises a microphone preamplifier and analog-to-digital converter generate microphone signal samples at a first predetermined rate. A speech feature extractor is configured for receipt and processing of predetermined blocks of the microphone signal samples to extract speech feature vectors representing speech features of the microphone signal samples. The microphone circuit assembly additionally comprises a speech vocabulary comprising a target word or target phrase of human speech encoded as a set of target feature vectors and a decision circuit is configured to compare the speech feature vectors generated by the speech feature extractor with target feature vectors to detect the target speech word or phrase. A controller is configured to generate a recognition signal on an externally accessible output terminal of the microphone circuit assembly in response to a recognized target word or phrase in the microphone signal samples. Additional aspects of the invention relates to Digital Signal Processing Systems comprising the microphone circuit assembly.

1 . (canceled) 
     
     
         2 . A system comprising:
 a microphone signal processor circuit configured to detect whether a target audio element is present in a portion of a received microphone signal using a first audio element vocabulary that comprises a first number of target audio elements, and when the microphone signal processor circuit detects the target audio element, the microphone signal processor circuit is configured to output at least one of a wakeup signal and audio signal samples corresponding to the detected target audio element; and   a verification processor circuit configured to receive the at least one of the wakeup signal and the audio signal samples from the microphone signal processor circuit and, in response, analyze the same portion or a subsequent portion of the received microphone signal using a second audio element vocabulary.   
     
     
         3 . The system of  claim 2 , wherein the verification processor circuit is configured to verify whether the microphone signal processor circuit correctly detected the target audio element in the portion of the received microphone signal. 
     
     
         4 . The system of  claim 3 , wherein the verification processor circuit is configured to provide a verification signal to the microphone signal processor circuit when the verification processor circuit verifies that the microphone signal processor circuit correctly detected the target audio element. 
     
     
         5 . The system of  claim 4 , wherein the microphone signal processor circuit samples the received microphone signal at a first sampling rate, and wherein in response to receiving the verification signal, the microphone signal processor circuit changes the sampling rate to a greater second sampling rate. 
     
     
         6 . The system of  claim 5 , wherein the microphone signal processor circuit includes an oscillator circuit that generates a clock signal corresponding to the first sampling rate, and wherein the microphone signal processor circuit includes a master clock input configured to receive an override clock signal corresponding to the second sampling rate. 
     
     
         7 . The system of  claim 2 , wherein the second audio element vocabulary comprises a greater second number of target audio elements than are provided in the first audio element vocabulary. 
     
     
         8 . The system of  claim 2 , wherein the microphone signal processor circuit is configured to detect whether the target audio element includes one or more of a specified word, phrase, speech command, or multiple phrases or multiple speech commands. 
     
     
         9 . The system of  claim 2 , wherein the microphone signal processor circuit is configured to detect the target audio element using target feature vectors representing speech features in samples of the microphone signal. 
     
     
         10 . The system of  claim 2 , wherein the microphone signal processor circuit is configured to detect the target audio element using neural network-based speech recognition. 
     
     
         11 . The system of  claim 2 , wherein the microphone signal processor circuit is configured to detect the target audio element using factor graphs-based speech recognition. 
     
     
         12 . A signal processing system for voice recognition, the system comprising:
 a first processor circuit including an input terminal configured to receive a microphone signal and an output terminal configured to provide a recognition signal, wherein the first processor circuit is configured to provide the recognition signal at the recognition signal output when the first processor circuit determines that the microphone signal received at the input terminal corresponds to a target word or phrase; and   a second processor circuit including a recognition signal input coupled to the output terminal of the first processor circuit, wherein in response to receiving the recognition signal from the first processor circuit, the second processor circuit is configured to wake from a low-power sleep mode to a higher-power active mode and, in the higher-power active mode, execute a speech recognition program to verify that the microphone signal corresponds to the same or different target word or phrase.   
     
     
         13 . The system of  claim 12 , further comprising:
 a first memory circuit accessible by the first processor circuit and comprising a first audio element vocabulary that includes the target word or phrase; and   a second memory circuit accessible by the second processor circuit and comprising a second audio element vocabulary that includes a greater number of audio elements than in the first audio element vocabulary.   
     
     
         14 . The system of  claim 12 , further comprising a circular speech buffer coupled to the first processor circuit and configured to store consecutive speech segments representing specified portions of the microphone signal. 
     
     
         15 . The system of  claim 14 , wherein when the second processor circuit verifies that the microphone signal corresponds to the same target word or phrase, the second processor circuit provides an approval signal to the first processor circuit and, in response to the approval signal, the first processor circuit is configured to provide information stored in the circular speech buffer to the second processor circuit. 
     
     
         16 . The system of  claim 12 , wherein the first processor circuit is configured to determine that the microphone signal received at the input terminal corresponds to the target word or phrase using a neural network-based speech recognizer or using a factor graphs-based speech recognizer. 
     
     
         17 . A method for performing voice recognition using a multiple-processor voice recognition system, the method comprising:
 receiving an audio input signal at an input terminal of a first processor circuit;   using the first processor circuit, determining whether a portion of the audio input signal corresponds to a target word or phrase;   when the first processor circuit determines that the portion of the audio input signal corresponds to the target word or phrase, providing a recognition signal to a different second processor circuit; and   in response to the recognition signal:
 waking the second processor circuit from a low-power mode to an active mode; and 
 verifying, using the second processor circuit, whether the portion of the audio input signal corresponds to the target word or phrase. 
   
     
     
         18 . The method of  claim 17 , further comprising:
 storing consecutive portions of the audio input signal in a buffer circuit coupled to the first processor circuit;   providing an approval signal from the second processor circuit to the first processor circuit when the second processor circuit verifies that the portion of the audio input signal corresponds to the target word or phrase; and   in response to the approval signal, providing the stored portions of the audio input signal from the buffer circuit to the second processor circuit.   
     
     
         19 . The method of  claim 17 , wherein the determining whether the portion of the audio input signal corresponds to the target word or phrase includes using a first audio element vocabulary circuit coupled to the first processor circuit, and wherein the verifying whether the portion of the audio input signal corresponds to the target word or phrase includes using a different second audio element vocabulary circuit coupled to the second processor circuit, wherein the second audio element vocabulary includes a greater number of audio elements than the first audio element vocabulary. 
     
     
         20 . The method of  claim 17 , wherein the determining whether the portion of the audio input signal corresponds to the target word or phrase using the first processor circuit includes using a neural network-based speech recognizer. 
     
     
         21 . The method of  claim 17 , wherein the determining whether the portion of the audio input signal corresponds to the target word or phrase using the first processor circuit includes using a factor graphs-based speech recognizer.