US2017207183A1PendingUtilityA1

Semiconductor device and manufacturing method thereof

Assignee: MITSUBISHI ELECTRIC CORPPriority: Jan 14, 2016Filed: Aug 29, 2016Published: Jul 20, 2017
Est. expiryJan 14, 2036(~9.5 yrs left)· nominal 20-yr term from priority
Inventors:Naoto Ando
H10W 90/756H10W 44/251H10W 74/137H10W 74/121H10W 74/016H10W 70/481H10W 70/465H10W 70/041H10W 44/20H10W 42/00H01L 2223/6683H01L 23/3135H01L 23/66H01L 23/49562H01L 29/8128H01L 21/4825H01L 21/565H01L 29/66848H01L 23/564H01L 23/4952H01L 29/408H10D 30/792H10D 30/00H10D 62/605H10D 64/118H10D 62/83H10D 30/877H10D 30/0612H10D 30/061H10D 64/647H10W 20/40
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Claims

Abstract

A semiconductor device includes: a semiconductor substrate; a semiconductor layer on the semiconductor substrate; a source electrode and a drain electrode spaced apart from each other on the semiconductor layer; a gate electrode on the semiconductor layer between the source electrode and the drain electrode; and an insulating film covering the semiconductor layer, the source electrode, the drain electrode and the gate electrode, the gate electrode has an eaves structure including a lower electrode joined to the semiconductor layer and an upper electrode provided on the lower electrode and wider than the lower electrode, a principal ingredient of the insulating film is an oxide film where atomic layers are alternately arrayed for each monolayer, and a film thickness of the insulating film that covers the lower electrode of the gate electrode is equal to a film thickness of the insulating film that covers the upper electrode.

Claims

exact text as granted — not AI-modified
1 . A semiconductor device comprising:
 a semiconductor substrate;   a semiconductor layer on the semiconductor substrate;   a source electrode and a drain electrode spaced apart from each other on the semiconductor layer;   a gate electrode on the semiconductor layer between the source electrode and the drain electrode; and   an insulating film covering the semiconductor layer, the source electrode, the drain electrode and the gate electrode,   the gate electrode has an eaves structure including a lower electrode joined to the semiconductor layer and an upper electrode provided on the lower electrode and wider than the lower electrode,   a principal ingredient of the insulating film is an oxide film where atomic layers are alternately arrayed for each monolayer, and   a film thickness of the insulating film that covers the lower electrode of the gate electrode is equal to a film thickness of the insulating film that covers the upper electrode.   
     
     
         2 . The semiconductor device of  claim 1 , wherein a concave portion is formed in the semiconductor layer, and the lower electrode of the gate electrode is joined to a bottom surface of the concave portion 
     
     
         3 . The semiconductor device of  claim 1 , wherein the principal ingredient of the insulating film is a Ta oxide film. 
     
     
         4 . The semiconductor device of  claim 1 , wherein the principal ingredient of the insulating film is a Si oxide film. 
     
     
         5 . The semiconductor device of  claim 1 , wherein the principal ingredient of the insulating film is a layered structure of a Ta oxide film and a Si oxide film. 
     
     
         6 . A semiconductor device comprising:
 a semiconductor chip;   a package in which the semiconductor chip is mounted; and   an insulating film covering the package,   wherein a principal ingredient of the insulating film is an oxide film where atomic layers are alternately arrayed for each monolayer.   
     
     
         7 . The semiconductor device of  claim 6 , wherein the principal ingredient of the insulating film is a Ta oxide film. 
     
     
         8 . The semiconductor device of  claim 6 , wherein the principal ingredient of the insulating film is a Si oxide film. 
     
     
         9 . The semiconductor device of  claim 6 , wherein the principal ingredient of the insulating film is a layered structure of a Ta oxide film and a Si oxide film. 
     
     
         10 . A manufacturing method of a semiconductor device comprising:
 forming a semiconductor layer on a semiconductor substrate;   forming a source electrode and a drain electrode spaced apart from each other on the semiconductor layer;   forming a gate electrode on the semiconductor layer between the source electrode and the drain electrode; and   forming an insulating film covering the semiconductor layer, the source electrode, the drain electrode and the gate electrode,   the gate electrode has an eaves structure including a lower electrode joined to the semiconductor layer and an upper electrode provided on the lower electrode and wider than the lower electrode,   the insulating film is formed using a method of laminating films of molecules of raw material compound by repeating steps of film formation through surface adsorption and reaction and removal of surplus molecules through purging for each monolayer, and   a film thickness of the insulating film that covers the lower electrode of the gate electrode is equal to a film thickness of the insulating film that covers the upper electrode.   
     
     
         11 . A manufacturing method of a semiconductor device comprising:
 forming a package in which the semiconductor chip is mounted; and   forming an insulating film covering the package,   wherein the insulating film is formed using a method of laminating films of molecules of raw material compound by repeating steps of film formation through surface adsorption and reaction and removal of surplus molecules through purging for each monolayer.

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