Semiconductor device and manufacturing method thereof
Abstract
A semiconductor device includes: a semiconductor substrate; a semiconductor layer on the semiconductor substrate; a source electrode and a drain electrode spaced apart from each other on the semiconductor layer; a gate electrode on the semiconductor layer between the source electrode and the drain electrode; and an insulating film covering the semiconductor layer, the source electrode, the drain electrode and the gate electrode, the gate electrode has an eaves structure including a lower electrode joined to the semiconductor layer and an upper electrode provided on the lower electrode and wider than the lower electrode, a principal ingredient of the insulating film is an oxide film where atomic layers are alternately arrayed for each monolayer, and a film thickness of the insulating film that covers the lower electrode of the gate electrode is equal to a film thickness of the insulating film that covers the upper electrode.
Claims
exact text as granted — not AI-modified1 . A semiconductor device comprising:
a semiconductor substrate; a semiconductor layer on the semiconductor substrate; a source electrode and a drain electrode spaced apart from each other on the semiconductor layer; a gate electrode on the semiconductor layer between the source electrode and the drain electrode; and an insulating film covering the semiconductor layer, the source electrode, the drain electrode and the gate electrode, the gate electrode has an eaves structure including a lower electrode joined to the semiconductor layer and an upper electrode provided on the lower electrode and wider than the lower electrode, a principal ingredient of the insulating film is an oxide film where atomic layers are alternately arrayed for each monolayer, and a film thickness of the insulating film that covers the lower electrode of the gate electrode is equal to a film thickness of the insulating film that covers the upper electrode.
2 . The semiconductor device of claim 1 , wherein a concave portion is formed in the semiconductor layer, and the lower electrode of the gate electrode is joined to a bottom surface of the concave portion
3 . The semiconductor device of claim 1 , wherein the principal ingredient of the insulating film is a Ta oxide film.
4 . The semiconductor device of claim 1 , wherein the principal ingredient of the insulating film is a Si oxide film.
5 . The semiconductor device of claim 1 , wherein the principal ingredient of the insulating film is a layered structure of a Ta oxide film and a Si oxide film.
6 . A semiconductor device comprising:
a semiconductor chip; a package in which the semiconductor chip is mounted; and an insulating film covering the package, wherein a principal ingredient of the insulating film is an oxide film where atomic layers are alternately arrayed for each monolayer.
7 . The semiconductor device of claim 6 , wherein the principal ingredient of the insulating film is a Ta oxide film.
8 . The semiconductor device of claim 6 , wherein the principal ingredient of the insulating film is a Si oxide film.
9 . The semiconductor device of claim 6 , wherein the principal ingredient of the insulating film is a layered structure of a Ta oxide film and a Si oxide film.
10 . A manufacturing method of a semiconductor device comprising:
forming a semiconductor layer on a semiconductor substrate; forming a source electrode and a drain electrode spaced apart from each other on the semiconductor layer; forming a gate electrode on the semiconductor layer between the source electrode and the drain electrode; and forming an insulating film covering the semiconductor layer, the source electrode, the drain electrode and the gate electrode, the gate electrode has an eaves structure including a lower electrode joined to the semiconductor layer and an upper electrode provided on the lower electrode and wider than the lower electrode, the insulating film is formed using a method of laminating films of molecules of raw material compound by repeating steps of film formation through surface adsorption and reaction and removal of surplus molecules through purging for each monolayer, and a film thickness of the insulating film that covers the lower electrode of the gate electrode is equal to a film thickness of the insulating film that covers the upper electrode.
11 . A manufacturing method of a semiconductor device comprising:
forming a package in which the semiconductor chip is mounted; and forming an insulating film covering the package, wherein the insulating film is formed using a method of laminating films of molecules of raw material compound by repeating steps of film formation through surface adsorption and reaction and removal of surplus molecules through purging for each monolayer.Join the waitlist — get patent alerts
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