Semiconductor circuits
Abstract
A semiconductor circuit includes a first circuit and a second circuit. The first circuit is configured to generate a voltage level at a first node based on a voltage level of input data, an inverted value of the voltage level at the first node, a voltage level of a clock signal, and a voltage level at a second node; and the second circuit is configured to generate the voltage level at the second node based on the voltage level of input data, an inverted value of the voltage level at the second node, the voltage level of the clock signal, and the inverted value of the voltage level at the first node. When the clock signal is at a first level, the first and second nodes have different logical levels. When the clock signal is at a second level, the first and second nodes have the same logical level.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A semiconductor circuit comprising:
a first circuit configured to generate a voltage level at a first node based on a voltage level of input data, an inverted value of the voltage level at the first node, a voltage level of a clock signal, and a voltage level at a second node; and a second circuit configured to generate the voltage level at the second node based on the voltage level of input data, an inverted value of the voltage level at the second node, the voltage level of the clock signal, and the inverted value of the voltage level at the first node, wherein
when the voltage level of the clock signal is at a first level, the first node and the second node have different logical levels,
when the voltage level of the clock signal is at a second level, the first node and the second node have the same logical level, and
the second level is different from the first level.Join the waitlist — get patent alerts
Track US2017302279A1 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.