Method and apparatus for memory management

Abstract

A method and apparatus of memory management are disclosed. Pooling of at least one memory to generate a memory pool, dividing the memory pool to generate at least one memory space, and allocating a respective memory space to a respective CPU in a one-to-one correspondence manner are performed. Further, the respective memory space allocated to the respective CPU is set as a pinned memory of the respective CPU. Additionally, setting unallocated memory space as a shared memory pool, obtaining a memory value that represents usage of the respective memory space by the respective CPU during operation, and determining if the memory value exceeds a preset threshold range are performed. Selecting, if the memory value exceeds the preset threshold range, additional memory space from the memory pool to allocate to the respective CPU or reallocating at least a portion of the respective memory space allocated to the CPU are performed.

What is claimed is: 
     
         1 . A server system comprising:
 a plurality of memory chips that define a memory space that includes a plurality of pinned memory spaces and an unallocated memory space;   a plurality of memory controllers having a plurality of channels, each channel being coupled to a number of memory chips of the plurality of memory chips; and   a plurality of CPUs coupled to the plurality of memory controllers in a one-to-one correspondence, the plurality of CPUs being pinned to the plurality of pinned memory spaces in a one-to-one correspondence, a CPU of the plurality of CPUs having a corresponding memory controller and a corresponding pinned memory space, the CPU to determine a utilization value of the corresponding pinned memory space and, when the utilization value exceeds an upper threshold, determine if a channel of the corresponding memory controller is coupled to a number of memory chips that include both the corresponding pinned memory space and a portion of the unallocated memory space.   
     
     
         2 . The server system of  claim 1  wherein when a channel of the corresponding memory controller is coupled to a number of memory chips that include both the corresponding pinned memory space and the portion of the unallocated memory space, the portion of the unallocated memory space is added to the corresponding pinned memory space to form an increased memory space. 
     
     
         3 . The server system of  claim 2  wherein the portion of the unallocated memory space is equal to 20% of the utilization value. 
     
     
         4 . The server system of  claim 2 , further comprising:
 when no channel of the corresponding memory controller is coupled to a number of memory chips that include both the corresponding pinned memory space and the portion of the unallocated memory space, the CPU to determine if a channel of the corresponding memory controller is coupled to a memory chip that includes a part of the unallocated memory space; and   when a channel of the corresponding memory controller is coupled to a memory chip that includes the part of the unallocated memory space, the part of the unallocated memory space is added to the corresponding pinned memory space to form the increased memory space.   
     
     
         5 . The server system of  claim 4 , further comprising:
 when no channel of the corresponding memory controller is coupled to a memory chip that includes the part of the unallocated memory space, the CPU to determine if a channel of a non-corresponding memory controller of the plurality of memory controllers is coupled to a memory chip that includes a piece of the unallocated memory space; and   when a channel of the non-corresponding memory controller is coupled to a memory chip that includes the piece of the unallocated memory space, the piece of the unallocated memory space is added to the pinned memory space to form the increased memory space.   
     
     
         6 . The server system of  claim 5 , wherein the CPU to further:
 determine a utilization value of the increased memory space;   when the utilization value of the increased memory space falls below the upper threshold, determine if the utilization value of the increased memory space falls below a lower threshold; and   when the utilization value of the increased memory space falls below the lower threshold, a section of the increased memory space is released to form a reduced memory space.   
     
     
         7 . The server system of  claim 6  wherein the section of the increased memory space is equal to 20% of the utilization value. 
     
     
         8 . A method of managing a memory comprising:
 pooling a plurality of memory chips to form a memory pool, the plurality of memory chips being coupled to a plurality of memory controllers, the plurality of memory controllers being coupled to a plurality of CPUs in a one-to-one correspondence;   dividing the memory pool to form a plurality of pinned memory spaces and an unallocated memory space;   pinning each pinned memory space to a corresponding CPU of the plurality of CPUs; and   adding memory space from the unallocated memory space to a pinned memory space to form an increased memory space when a utilization of the pinned memory space exceeds an upper threshold.   
     
     
         9 . The method of  claim 8  wherein the memory space added from the unallocated memory space is equal to 20% of the utilization. 
     
     
         10 . The method of  claim 9  and further comprising releasing memory space from the increased memory space when a utilization of the increased memory space falls below both the upper threshold and a lower threshold. 
     
     
         11 . The method of  claim 10  and further comprising adding memory to the memory pool to increase a size of the unallocated memory space. 
     
     
         12 . The method of  claim 11  wherein each memory controller has a plurality of channels, each channel being coupled to one or more memory chips. 
     
     
         13 . The method of  claim 12  wherein the plurality of memory controllers are electrically coupled together. 
     
     
         14 . A method of operating a memory space that has a plurality of pinned memory spaces and an unallocated memory space, the method comprising:
 obtaining a utilization value that represents usage of a pinned memory space of the plurality of pinned memory spaces by a CPU during operation, the CPU being coupled to a memory controller, the memory controller having a plurality of channels, one or more channels being coupled to one or more memory chips that include the pinned memory space;   determining if the utilization value exceeds an upper threshold;   when the utilization value exceeds the upper threshold, determining if a channel of the memory controller is coupled to a number of memory chips that include both the pinned memory space and a portion of the unallocated memory space.   
     
     
         15 . The method of  claim 14  wherein when a channel of the memory controller is coupled to a number of memory chips that include both the first pinned memory space and the portion of the unallocated memory space, adding the portion of the unallocated memory space to the pinned memory space to form an increased memory space. 
     
     
         16 . The method of  claim 15  wherein the portion of the unallocated memory space is equal to 20% of the utilization value. 
     
     
         17 . The method of  claim 15 , further comprising:
 when no channel of the memory controller is coupled to a number of memory chips that include both the pinned memory space and the portion of the unallocated memory space, determining if a channel of the memory controller is coupled to a memory chip that includes a part of the unallocated memory space; and   when a channel of the memory controller is coupled to a memory chip that includes the part of the unallocated memory space, adding the part of the unallocated memory space to the pinned memory space to form the increased memory space.   
     
     
         18 . The method of  claim 17 , further comprising:
 when no channel of the memory controller is coupled to a memory chip that includes the part of the unallocated memory space, determining if a channel of another memory controller is coupled to a memory chip that includes a piece of the unallocated memory space, said another memory controller being coupled to another CPU; and   when a channel of said another memory controller is coupled to a memory chip that includes the piece of the unallocated memory space, adding the piece of the unallocated memory space to the pinned memory space to form the increased memory space.   
     
     
         19 . The method of  claim 18 , further comprising:
 determining a utilization value of the increased memory space;   when the utilization value of the increased memory space falls below the upper threshold, determine if the utilization value of the increased memory space falls below a lower threshold; and   when the utilization value of the increased memory space falls below the lower threshold, releasing a section of the increased memory space to form a reduced memory space.   
     
     
         20 . The method of  claim 19  wherein the section of the increased memory space is equal to 20% of the utilization value.