Devices and methods of fabrication of sinusoidal patterned silicon dioxide substrates

Abstract

A method for fabricating nanoscale patterned oxide substrates and devices incorporating the substrates are provided. Highly periodic or non-periodic sinusoidal patterns and other fine oxide patterns are formed on the surface of a suitable base such as silicon. Fine oxide surface patterns are created with photolithography, etching and three different oxide formation events. Thin layers of conductor materials including graphene and metals can be applied to the oxide surface patterns of the substrate and conform to the pattern allowing morphology and physical properties the conductor layer to be tuned. Control over device characteristics is demonstrated by varying the dimensions, strain, orientation, wavelength and amplitude of graphene sheet corrugations. A patch antenna device with a periodic sinusoidal graphene sheet on a silicon oxide substrate mounted to a ground plane was demonstrated.

What is claimed is: 
     
         1 . A method for fabricating patterned graphene sheets, the method comprising:
 (a) producing one or more graphene sheets;   (b) fabricating a substrate with a patterned oxide surface;   (c) applying one or more graphene sheets to the patterned oxide surface to form a layer of graphene; and   (d) conforming the layer of graphene to the surface pattern of the oxide surface.   
     
     
         2 . The method of  claim 1 , further comprising:
 applying one or more graphene sheets to the layer of graphene to form a second layer of graphene; and   conforming said layers of graphene to the surface pattern of the oxide surface.   
     
     
         3 . The method of  claim 1 , further comprising:
 applying one or more graphene sheets to the layer of graphene to form a second layer of graphene; and   applying one or more graphene sheets to the second layer to form a third layer of graphene; and   conforming said layers of graphene to the surface pattern of the oxide surface.   
     
     
         4 . The method of  claim 1 , wherein said fabricating a substrate comprises:
 thermally oxidizing a surface of a silicon base to form an oxidized silicon base;   patterning the oxidized base with photolithography;   forming the pattern in the silicon base;   clearing the surface oxidization from the patterned silicon base;   growing a first oxide mask on the cleaned patterned silicon base;   removing the first oxide mask from the patterned silicon base; and   growing a second oxide mask on the patterned silicon base to produce a final silicon substrate with a patterned oxide surface.   
     
     
         5 . The method of  claim 4 , wherein said forming the pattern in the silicon base comprises:
 dry etching the oxidized base to expose the silicon base in the form of the pattern;   anisotropically etching the exposed silicon pattern to etch the pattern into the silicon base; and   removing remaining oxide from the surface of the oxidized base.   
     
     
         6 . The method of  claim 4 , wherein said pattern in said silicon base comprises parallel trenches equally spaced apart. 
     
     
         7 . The method of  claim 6 , wherein a width of each trench is equal to a distance between each trench. 
     
     
         8 . The method of  claim 6 , wherein said pattern of parallel trenches in said silicon base comprises trenches with a “V” shaped cross-section. 
     
     
         9 . The method of  claim 1 , further comprising:
 identifying a graphene sheet morphology; and   forming a patterned oxide surface on the substrate of the same pattern as the identified graphene sheet morphology.   
     
     
         10 . The method of  claim 9 , wherein said identifying a graphene sheet morphology comprises:
 selecting a corrugated sheet morphology; and   selecting an orientation, wavelength and amplitude of the graphene sheet corrugations.   
     
     
         11 . The method of  claim 10 , wherein the selecting of the orientation, wavelength and amplitude of the graphene sheet corrugations is made to provide a characteristic graphene sheet conductivity. 
     
     
         12 . The method of  claim 10 , wherein the selecting of the orientation, wavelength and amplitude of the graphene sheet corrugations is made to provide a characteristic strain on a graphene sheet layer. 
     
     
         13 . The method of  claim 10 , further comprising:
 selecting substrate length and width dimensions.   
     
     
         14 . The method of  claim 9 , wherein said pattern of said patterned oxide surface comprises a periodic sinusoidal oxide surface pattern. 
     
     
         15 . The method of  claim 9 , wherein said pattern of said patterned oxide surface comprises a non-periodic sinusoidal oxide surface pattern. 
     
     
         16 . A method for fabricating a microstrip patch antenna, the method comprising:
 (a) fabricating a silicon substrate with a periodic sinusoidal patterned oxide surface;   (b) conforming at least one layer of a conductor to the surface pattern of the patterned oxide surface of the silicon substrate;   (c) positioning the silicon substrate adjacent to a ground plane; and   (d) coupling the conductive layer to a port.   
     
     
         17 . The method of  claim 16 , wherein said conductive layer is a conductor selected from the group of conductors consisting of a metal, graphene and a conductive polymer. 
     
     
         18 . The method of  claim 16 , further comprising:
 selecting the orientation, wavelength and amplitude of the sinusoidal conductor pattern; and   selecting length and width dimensions of the patch to tune the frequency of the antenna.   
     
     
         19 . A method for fabricating a substrate with a patterned oxide surface, the method comprising:
 (a) thermally oxidizing a surface of a silicon base to form an oxidized silicon base;   (b) patterning the oxidized base with photolithography;   (c) forming the pattern in the silicon base;   (d) clearing the surface oxidization from the patterned silicon base;   (e) growing a first oxide mask on the cleaned patterned silicon base;   (f) removing the first oxide mask from the patterned silicon base; and   (g) growing a second oxide mask on the patterned silicon base to produce a final silicon substrate with a patterned oxide surface.   
     
     
         20 . The method of  claim 19 , wherein said forming the pattern in the silicon base comprises:
 dry etching the oxidized base to expose the silicon base in the form of the pattern;   anisotropically etching the exposed silicon pattern to etch the pattern into the silicon base; and   removing remaining oxide from the surface of the oxidized base.   
     
     
         21 . The method of  claim 19 , wherein said pattern in said silicon base comprises parallel trenches equally spaced apart. 
     
     
         22 . The method of  claim 21 , wherein a width of each trench is equal to a distance between each trench. 
     
     
         23 . The method of  claim 21 , wherein said pattern of parallel trenches in said silicon base comprises trenches with a “V” shaped cross-section. 
     
     
         24 . An apparatus comprising:
 (a) a silicon substrate with a patterned silicon dioxide surface; and   (b) a layer of graphene disposed on said silicon dioxide surface of said silicon substrate conforming to the silicon dioxide pattern.   
     
     
         25 . The apparatus of  claim 24 , wherein said pattern comprises a periodic nanoscale sinusoidal pattern. 
     
     
         26 . The apparatus of  claim 24 , wherein said pattern comprises a non-periodic nanoscale sinusoidal pattern. 
     
     
         27 . The apparatus of  claim 24 , wherein said pattern comprises parallel trenches equally spaced apart. 
     
     
         28 . The apparatus of  claim 27 , wherein a width of each trench is equal to a distance between each trench. 
     
     
         29 . The apparatus of  claim 27 , wherein said pattern of parallel trenches comprises trenches with a “V” shaped cross-section. 
     
     
         30 . A microstrip patch antenna apparatus, comprising:
 (a) at least one patch of one or more layers of a conductor conformed to a sinusoidal patterned oxide surface of a silicon substrate;   (b) a ground plane adjacent to the silicon substrate; and   (c) a port coupled to the conductor.   
     
     
         31 . The apparatus of  claim 30 , wherein said conductor layer is a conductor selected from the group of conductors consisting of a metal, graphene, and a conductive polymer. 
     
     
         32 . The apparatus of  claim 30 , further comprising a second port coupled to the conductor. 
     
     
         33 . The apparatus of  claim 30 , wherein said patterned oxide surface comprises a periodic sinusoidal oxide surface pattern. 
     
     
         34 . The apparatus of  claim 30 , wherein said patterned oxide surface comprises a non-periodic sinusoidal oxide surface pattern.