Igbt/fet-based energy savings device for reducing a predetermined amount of voltage using pulse width modulation

Abstract

An IGBT/FET-based energy savings device, system and method wherein a predetermined amount of voltage below a nominal line voltage and/or below a nominal appliance voltage is saved, thereby conserving energy. Phase input connections are provided for inputting analog signals into the device and system. A magnetic flux concentrator senses the incoming analog signal and a volts zero crossing point detector determines the zero volts crossing point of the signal. The positive half cycle and negative half cycle of the signal are identified and routed to a digital signal processor for processing the signal. The signal is reduced by pulse width modulation and the reduced amount of energy is outputted, thereby yielding an energy savings for an end user.

I claim: 
     
         1 . An energy savings device comprising:
 at least one phase input connection configured to input a predetermined amount of energy having at least one analog signal;   at least one volts zero crossing point detector configured to determine at least one zero crossing point of said at least one analog signal;   at least one half cycle identifier configured to identify at least one positive half cycle of said at least one analog signal and at least one negative half cycle of said at least one analog signal;   at least one logic device configured to route said at least one positive half cycle of said at least one analog signal and said at least one negative half cycle of said at least one analog signal to at least one digital signal processor configured to process said at least one analog signal;   at least one drive control configured to reduce said predetermined amount of energy by providing pulse width modulation to said at least one analog signal to yield a reduced amount of energy, wherein said at least one drive control is in electrical connection with said at least one digital signal processor; and   at least one phase output connection configured to output said reduced amount of energy, wherein said at least one drive control comprises a positive half cycle control transistor configured to provide pulse width modulation to said at least one positive half cycle of said at least one analog signal, a negative half cycle control transistor configured to provide pulse width modulation to said at least one negative half cycle of said at least one analog signal, a first shunt control transistor and a second shunt control transistor configured as routing switches to clamp a back electromotive force.   
     
     
         2 . The energy savings device of  claim 1  further comprising:
 at least one sensing means for sensing said predetermined amount of energy. 
 
     
     
         3 . The energy savings device of  claim 1  further comprising:
 at least one analog signal conditioning device configured to condition said at least one analog signal for inputting into said at least one half cycle identifier. 
 
     
     
         4 . The energy savings device of  claim 1  further comprising:
 at least one lost phase detection device configured to prepare said at least one analog signal for inputting into said at least one half cycle identifier. 
 
     
     
         5 . The energy savings device of  claim 1  further comprising:
 at least one phase rotation device configured to prepare said at least one analog signal for inputting into said at least one half cycle identifier. 
 
     
     
         6 . The energy savings device of  claim 1  further comprising:
 at least one power supply unit in electrical connection with said energy savings device configured to power said energy savings device. 
 
     
     
         7 . The energy savings device of  claim 1  further comprising:
 at least one floating power supply in electrical connection with said at least one drive control. 
 
     
     
         8 . The energy savings device of  claim 1  further comprising:
 at least one computing device in electrical connection with said energy savings device. 
 
     
     
         9 . The energy savings device of  claim 1  further comprising:
 at least one communications interface in electrical connection with said at least one digital signal processor. 
 
     
     
         10 . The energy savings device of  claim 1  further comprising:
 at least one reset switch in electrical connection with said at least one digital signal processor. 
 
     
     
         11 . The energy savings device of  claim 10  further comprising:
 at least one light emitting diode in electrical connection with said at least one reset switch. 
 
     
     
         12 . The energy savings device of  claim 1  further comprising:
 at least one digital electricity meter in electrical connection with said at least one digital signal processor. 
 
     
     
         13 . The energy savings device of  claim 1 , wherein said positive half cycle control transistor and said negative half cycle control transistor are IGBT devices. 
     
     
         14 . The energy savings device of  claim 1 , wherein said positive half cycle control transistor and said negative half cycle control transistor are FET devices. 
     
     
         15 . The energy savings device of  claim 1 , wherein said first shunt control transistor and said second shunt control transistor are IGBT devices. 
     
     
         16 . The energy savings device of  claim 1 , wherein said first shunt control transistor and said second shunt control transistor are FET devices. 
     
     
         17 . The energy savings device of  claim 1 , wherein said at least one digital signal processor comprises at least one real-time clock. 
     
     
         18 . The energy savings device of  claim 1 , wherein said at least one digital signal processor comprises at least one analog-to-digital converter. 
     
     
         19 . The energy savings device of  claim 1 , wherein said at least one digital signal processor is in electrical connection with said at least one logic device. 
     
     
         20 . The energy savings device of  claim 1 , wherein said at least one logic device is in electrical connection with said at least one half cycle identifier.