Methods and apparatuses to wake computer systems from sleep states
Abstract
Embodiments of the invention describe apparatuses, systems and methods to detect, during a host platform sleep state, a peripheral device audio jack plug being coupled to (e.g., inserted into) an audio jack connection socket. A specific sleep state of the host platform may be determined, and a system wake event may be generated so that the host platform wakes from the sleep state in response to the peripheral device being coupled to the audio jack connection socket. Thus, embodiments of the invention incorporated in handheld mobile computing devices such as smartphones and tablet computers with limited input/output (I/O) provide a user with alternative means for waking the device from a sleep state.
Claims
exact text as granted — not AI-modified1 . A system comprising:
a processor to execute a sleep state; a system memory to store system information in response to the processor executing the sleep state; an audio jack connection; detection and control logic to generate a system wake event in response to detecting an audio plug being inserted into the audio jack connection; and a platform interconnect to receive the system wake event from the detection and control logic, and to initiate a power-up sequence for the processor and system memory in response to receiving the system wake event.
2 . The system of claim 1 , wherein the sleep state comprises a suspend to random access memory (RAM) sleep mode, and the system memory comprises system RAM memory.
3 . The system of claim 1 , wherein the sleep state comprises a suspend to disk drive memory mode, and the system memory comprises system disk drive memory.
4 . The system of claim 1 , wherein the power-up sequence comprises basic input/output system (BIOS) instructions.
5 . The system of claim 1 , the detection and control logic to further determine whether the audio plug is coupled to at least one of audio output device or an audio input device, and wherein generating the system wake event comprises generating at least one of an audio output device wake event or an audio input device wake event.
6 . The system of claim 5 , the platform interconnect to further:
load an audio output device codec for the system in response to receiving the audio output device wake event; and load an audio input device codec for the system in response to receiving the audio input device wake event.
7 . The system of claim 1 , wherein the system is included in a tablet computer, and the system further comprises a display device deactivated during the sleep state.
8 . The system of claim 7 , the platform interconnect to further initiate a power-up sequence for the display device.
9 . The system of claim 1 , the detection and control logic to further generate a system sleep event corresponding to the sleep state in response to detecting the audio plug removed from the audio jack connection.
10 . An apparatus comprising:
a processor to execute a sleep state; an audio jack connection; detection and control circuitry to generate a wake event in response to detecting an audio plug being inserted into the audio jack connection; and a platform interconnect to receive the wake event from the detection and control logic, and to initiate a power-up sequence for the processor in response to receiving the wake event.
11 . The apparatus of claim 10 , wherein the power-up sequence comprises basic input/output system (BIOS) instructions.
12 . The apparatus of claim 10 , the detection and control circuitry to further determine whether the audio plug is coupled to at least one of audio output device or an audio input device, and wherein generating the wake event comprises generating at least one of an audio output device wake event or an audio input device wake event.
13 . The apparatus of claim 12 , the platform interconnect to further:
load an audio output device codec in response to receiving the audio output device wake event; and load an audio input device codec in response to receiving the audio input device wake event.
14 . The apparatus of claim 10 , the detection and control circuitry to further generate a sleep event corresponding to the sleep state in response to detecting the audio plug removed from the audio jack connection.
15 . A method comprising:
detecting, during a platform sleep state, an audio jack plug coupled to an audio jack socket; determining a power level of the platform; determining a sleep state of the platform based on the power level; and generating a platform wake event for the determined platform sleep state.
16 . The method of claim 15 , wherein the platform sleep state comprises a suspend to random access memory (RAM) sleep mode.
17 . The method of claim 15 , wherein the platform sleep state comprises a suspend to disk drive memory mode.
18 . The method of claim 15 , further comprising determining whether the audio jack plug is coupled to at least one of audio output device or an audio input device, wherein generating the platform wake event comprises generating at least one of audio output device wake event or an audio input device wake event.
19 . The method of claim 18 , further comprising:
loading an audio output device codec for the platform in response to receiving the audio output device wake event; and loading an audio input device codec for the platform in response to receiving the audio input device wake event.
20 . The method of claim 15 , further comprising:
detecting the audio jack plug being removed from the audio jack connection; and generating a platform sleep event corresponding to the sleep state in response to detecting the audio jack plug being removed from the audio jack connection.Join the waitlist — get patent alerts
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