Method and apparatus for managing computing system power

Abstract

An apparatus may include first circuitry coupled to one or more platform components, the first circuitry operative to receive an unfiltered input voltage signal, compare a first voltage level of the unfiltered input voltage signal to a first reference voltage level, and generate a control signal operative to lower operation power of one or more of the one or more platform components when the first voltage level is less than the first reference voltage level.

1 - 27 . (canceled) 
     
     
         28 . An apparatus, comprising:
 a memory; and   logic for managing computing system power, at least a portion of the logic implemented in circuitry coupled to the memory, the logic to:
 monitor a control signal in response to activity of a platform component, the control signal associated with operation of the platform component; 
 identify assertion of the control signal; 
 signal to throttle performance of the platform component based on assertion of the control signal; and 
 determine whether to signal to adjust a maximum current of the platform component based on a duration that the control signal is asserted. 
   
     
     
         29 . The apparatus of  claim 28 , assertion of the control signal to indicate the platform component is overheated. 
     
     
         30 . The apparatus of  claim 28 , the logic to signal to reduce the maximum current of the platform component when the duration that the control signal is asserted exceeds a threshold. 
     
     
         31 . The apparatus of  claim 30 , the logic to:
 identify cessation of assertion of the control signal; and   signal to increase the maximum current of the platform component in response to cessation of assertion of the control signal.   
     
     
         32 . The apparatus of  claim 28 , the logic to signal the platform component to reduce an operating frequency to throttle performance of the platform component. 
     
     
         33 . The apparatus of  claim 28 , the control signal comprising a PROCHOT# signal. 
     
     
         34 . The apparatus of  claim 28 , the logic to signal to adjust the maximum current of the platform component when the duration that the control signal is asserted exceeds a threshold between five and fifty milliseconds. 
     
     
         35 . The apparatus of  claim 28 , the logic to monitor output through a pin to monitor the control signal. 
     
     
         36 . The apparatus of  claim 28 , the platform component comprising one or more components of a central processing unit (CPU), a graphics processor, or a memory. 
     
     
         37 . A computer-implemented method, comprising:
 monitoring a control signal in response to activity of a platform component, the control signal associated with operation of the platform component;   identifying assertion of the control signal;   signaling to throttle performance of the platform component based on assertion of the control signal; and   determining whether to signal to adjust a maximum current of the platform component based on a duration that the control signal is asserted.   
     
     
         38 . The computer-implemented method of  claim 37 , assertion of the control signal to indicate the platform component is overheated. 
     
     
         39 . The computer-implemented method of  claim 37 , comprising signaling to reduce the maximum current of the platform component when the duration that the control signal is asserted exceeds a threshold. 
     
     
         40 . The computer-implemented method of  claim 39 , comprising:
 identifying cessation of assertion of the control signal; and   signaling to increase the maximum current of the platform component in response to cessation of assertion of the control signal.   
     
     
         41 . The computer-implemented method of  claim 37 , comprising signaling the platform component to reduce an operating frequency to throttle performance of the platform component. 
     
     
         42 . The computer-implemented method of  claim 37 , comprising signaling to adjust the maximum current of the platform component when the duration that the control signal is asserted exceeds a threshold between five and fifty milliseconds. 
     
     
         43 . The computer-implemented method of  claim 37 , comprising monitoring output through a pin to monitor the control signal. 
     
     
         44 . The computer-implemented method of  claim 37 , the platform component comprising one or more components of a central processing unit (CPU), a graphics processor, or a memory. 
     
     
         45 . At least one non-transitory computer-readable medium comprising a set of instructions that, in response to being executed by a processor circuit, cause the processor circuit to:
 monitor a control signal in response to activity of a platform component, the control signal associated with operation of the platform component;   identify assertion of the control signal;   signal to throttle performance of the platform component based on assertion of the control signal; and   determine whether to signal to adjust a maximum current of the platform component based on a duration that the control signal is asserted.   
     
     
         46 . The at least one non-transitory computer-readable medium of  claim 45 , assertion of the control signal to indicate the platform component is overheated. 
     
     
         47 . The at least one non-transitory computer-readable medium of  claim 45 , comprising instructions that, in response to being executed by the processor circuit, cause the processor circuit to signal to reduce the maximum current of the platform component when the duration that the control signal is asserted exceeds a threshold. 
     
     
         48 . The at least one non-transitory computer-readable medium of  claim 47 , comprising instructions that, in response to being executed by the processor circuit, cause the processor circuit to:
 identify cessation of assertion of the control signal; and   signal to increase the maximum current of the platform component in response to cessation of assertion of the control signal.   
     
     
         49 . The at least one non-transitory computer-readable medium of  claim 45 , comprising instructions that, in response to being executed by the processor circuit, cause the processor circuit to signal the platform component to reduce an operating frequency to throttle performance of the platform component. 
     
     
         50 . The at least one non-transitory computer-readable medium of  claim 45 , the control signal comprising a PROCHOT# signal. 
     
     
         51 . The at least one non-transitory computer-readable medium of  claim 45 , comprising instructions that, in response to being executed by the processor circuit, cause the processor circuit to signal to adjust the maximum current of the platform component when the duration that the control signal is asserted exceeds a threshold between five and fifty milliseconds. 
     
     
         52 . The apparatus of  claim 45 , comprising instructions that, in response to being executed by the processor circuit, cause the processor circuit to monitor output through a pin to monitor the control signal.