Semiconductor device

Abstract

A plurality of first wiring layers are arranged on a main surface of a substrate, a first insulating film is arranged on upper faces of the plurality of first wiring layers, a second insulating film is arranged on an upper face of the first insulating film, and a plurality of second wiring layers are arranged on the second insulating film. A metal resistive element layer is arranged just below at least one second wiring layer among the plurality of second wiring layers. A plurality of conductive layers extend from the plurality of second wiring layers respectively to the metal resistive element layer in a Z direction perpendicular to the main surface. The metal resistive element layer includes a metal wiring layer. At least one part of a side face of at least one conductive layer among the plurality of conductive layers is connected to the metal wiring layer.

What is claimed is: 
     
         1 . A semiconductor device comprising:
 a substrate having a main surface;   a plurality of first wiring layers arranged on said main surface of said substrate;   a first insulating film arranged so as to cover upper faces of said plurality of first wiring layers;   a second insulating film arranged so as to cover an upper face of said first insulating film;   at least one second wiring layer arranged on said second insulating film; a metal resistive element layer arranged on the upper face of said first insulating film so as to be positioned above at least one first wiring layer among said plurality of first wiring layers; and   a plurality of conductive layers extending respectively to said plurality of first wiring layers in a direction perpendicular to said main surface, wherein   at least one conductive layer among said plurality of conductive layers extends from said metal resistive element layer to said first wiring layer in the direction perpendicular to said main surface.   
     
     
         2 . A semiconductor device comprising:
 a substrate having a main surface;   at least one first wiring layer arranged on said main surface of said substrate;   a first insulating film arranged so as to cover an upper face of said at least one first wiring layer;   a second insulating film arranged so as to cover an upper face of said first insulating film;   a plurality of second wiring layers arranged on said second insulating film;   a metal resistive element layer arranged on the upper face of said first insulating film so as to be positioned below at least one second wiring layer among said plurality of second wiring layers; and   a plurality of conductive layers extending respectively from said plurality of second wiring layers toward said metal resistive element layer in a direction perpendicular to said main surface, wherein   at least one conductive layer among said plurality of conductive layers extends from said second wiring layer to said metal resistive element layer in the direction perpendicular to said main surface.   
     
     
         3 . The semiconductor device according to  claim 2 , wherein
 said at least one conductive layer extending to said metal resistive element layer among said plurality of conductive layers is a resistive element region conductive layer arranged in a metal resistive element region overlapping with said metal resistive element layer in plan view, and   at least one conductive layer among said plurality of conductive layers is a wiring region conductive layer arranged in a wiring region other than said metal resistive element region so as to extend from at least one second wiring layer among said plurality of second wiring layers to said at least one first wiring layer.   
     
     
         4 . A semiconductor device comprising:
 a substrate having a main surface;   a plurality of first wiring layers arranged on said main surface of said substrate;   a first insulating film arranged so as to cover upper faces of said plurality of first wiring layers;   at least one metal resistive element layer arranged on said first insulating film;   at least one second wiring layer including the same layer as said at least one metal resistive element layer; and   a plurality of conductive layers extending from at least one of said metal resistive element layer and said second wiring layer to said plurality of first wiring layers, respectively, in a direction perpendicular to said main surface, in each of a metal resistive element region having said at least one metal resistive element layer and a wiring region having said at least one second wiring layer.   
     
     
         5 . The semiconductor device according to  claim 4 , wherein
 at least one of said plurality of conductive layers is a resistive element region conductive layer which is arranged in said metal resistive element region overlapping with said metal resistive element layer in plan view, and connected to extend from said at least one metal resistive element layer to at least one first wiring layer among said plurality of first wiring layers, and   at least one of said plurality of conductive layers is a wiring region conductive layer which is arranged in the wiring region other than said metal resistive element region, and extends from said at least one second wiring layer to at least one first wiring layer among said plurality of first wiring layers.   
     
     
         6 . The semiconductor device according to  claim 5 , wherein
 a plurality of said second wiring layers are included in said metal resistive element region, and   said metal resistive element layer is arranged on upper faces and side faces of a pair of said second wiring layers adjacent to each other in said metal resistive element region and arranged on said first insulating film between said pair of said second wiring layers adjacent to each other.   
     
     
         7 . The semiconductor device according to  claim 5 , wherein
 at least one of an upper face and a side face of said second wiring layer in said wiring region is covered with another metal resistive element layer including the same layer as said metal resistive element layer.