US2017371825A1PendingUtilityA1
Method and Apparatus for Scalable Low Latency Solid State Drive Interface
Assignee: FUTUREWEI TECHNOLOGIES INCPriority: Nov 17, 2011Filed: Aug 23, 2017Published: Dec 28, 2017
Est. expiryNov 17, 2031(~5.3 yrs left)· nominal 20-yr term from priority
Inventors:Yiren Ronnie Huang
G06F 13/4022G06F 2213/0026Y02B60/1228G06F 13/409Y02B60/1235Y02D10/00
54
PatentIndex Score
0
Cited by
0
References
0
Claims
Abstract
A solid state drive (SSD) apparatus includes a plurality of solid state drives. The SSD apparatus also includes a channel-interleaved interface operably coupled to the plurality of solid state drives, the channel-interleaved interface configured to generate interleaved commands including a first command sent on a first channel-interleaved with a second command sent on a second channel in bursts. Additionally, the SSD includes a Peripheral Component Interconnect Express (PCIe) bridge operably coupled to the channel-interleaved interface.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A solid state drive (SSD) apparatus, comprising:
a plurality of solid state drives; a channel-interleaved interface operably coupled to the plurality of solid state drives, the channel-interleaved interface configured to generate interleaved commands in bursts, comprising a first command sent on a first channel interleaved with a second command sent on a second channel; and a Peripheral Component Interconnect Express (PCIe) bridge operably coupled to the channel-interleaved interface.
2 . The SSD apparatus of claim 1 , wherein the channel-interleaved interface is further configured to utilize a data frame comprising a frame header, frame data, and a frame cyclic redundancy check (CRC).
3 . The SSD apparatus of claim 1 , wherein the channel-interleaved interface is further configured to generate the interleaved commands by interleaving a read command between portions of write commands.
4 . The SSD apparatus of claim 1 , wherein the second command is a write command, and wherein the channel-interleaved interface is further configured to issue write commands in multiple bursts.
5 . The SSD apparatus of claim 1 , wherein the PCIe bridge is operably coupled to a PCIe bridge controller.
6 . The SSD apparatus of claim 1 , wherein the PCIe bridges are operably coupled to a blade motherboard.
7 . The SSD apparatus of claim 1 , wherein the channel-interleaved interface comprises a fabric switch.
8 . The SSD apparatus of claim 1 , wherein the channel-interleaved interface is operably coupled to a fiber channel network connection.
9 . The SSD apparatus of claim 1 , wherein the channel-interleaved interface is operably coupled to a network connection.
10 . A solid state drive (SSD) apparatus, comprising:
a plurality of solid state drives; a channel-interleaved interface operably coupled to the plurality of solid state drives, the channel-interleaved interface configured to generate interleaved commands in bursts, comprising a first command sent on a first channel interleaved with a second command sent on a second channel; and a plurality of Peripheral Component Interconnect Express (PCIe) bridges operably coupled to the channel-interleaved interface, each of the PCIe bridges configured to exchange data with each of the solid state drives through the channel-interleaved interface.
11 . The SSD apparatus of claim 10 , wherein the channel-interleaved interface is further configured to generate interleaved commands by inserting a read command after a first portion of a write command and before a second portion of the write command.
12 . The SSD apparatus of claim 11 , wherein the second command is a write command, and the channel-interleaved interface is further configured to send write commands to the solid state drives in discrete segment bursts.
13 . The SSD apparatus of claim 10 , wherein the channel-interleaved interface is configured to exchange, with the solid state drives, data frames having a frame header.
14 . The SSD apparatus of claim 10 , wherein the channel-interleaved interface is configured to exchange, with the solid state drives, data frames having a frame cyclic redundancy check (CRC).
15 . The SSD apparatus of claim 10 , wherein the channel-interleaved interface is operably coupled to a fiber channel network connection.
16 . A method comprising:
generating, by a channel-interleaved interface, an interleaved command in bursts comprising a read command transmitted on a first channel that is sent from an expansion bus bridge, wherein the read command is interleaved with a write data command transmitted on a second channel that is sent from the expansion bus bridge; sending, by the channel-interleaved interface to a solid state drive, the interleaved command; and receiving, by the channel-interleaved interface from the solid state drive, data, in response to the read command in the interleaved command.
17 . The method of claim 16 , further comprising:
formatting a data frame to include a frame header; formatting the data frame to include a cyclic redundancy check (CRC) header; and formatting the data into data frames disposed between the frame header and the CRC header.
18 . The method of claim 16 , further comprising sending the data received from the solid state drive to a Peripheral Component Interconnect Express (PCIe) bridge.
19 . The method of claim 16 , further comprising accessing a fiber channel network connection.
20 . The method of claim 16 , further comprising accessing a network connection.Cited by (0)
No later patents cite this yet.
References (0)
No backward citations on record.