US2018068845A1PendingUtilityA1

Manufacturing method of semiconductor device

Assignee: RENESAS ELECTRONICS CORPPriority: May 14, 2015Filed: Nov 13, 2017Published: Mar 8, 2018
Est. expiryMay 14, 2035(~8.8 yrs left)· nominal 20-yr term from priority
Inventors:Takuya Hagiwara
H10P 95/90H10P 95/064H10P 70/23H10P 50/695H10P 50/692H10P 50/642H10P 50/283H10P 50/73H10P 14/69433H10P 14/69215H10D 64/01302H10W 10/17H10W 10/014H10P 76/2041G03F 7/2041H01L 21/0274H01L 21/324H01L 21/31116G03F 7/2028G03F 7/32G03F 7/2022H01L 21/31055H01L 21/30604G03F 7/0392H01L 21/02164H01L 21/28017G03F 7/38H01L 21/0206H01L 21/31144G03F 7/168H01L 29/66568H01L 21/76224G03F 7/094H01L 21/3081G03F 7/162G03F 7/327H01L 21/3086H01L 21/0217H10D 30/027G03F 7/2043G03F 7/0035G03F 7/70341G03F 7/11
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Claims

Abstract

The reliability of a semiconductor device is improved. In a manufacturing method, a film to be processed is formed over a circular semiconductor substrate, and a resist layer whose surface has a water-repellent property is formed thereover. Subsequently, the water-repellent property of the resist layer in the outer peripheral region of the circular semiconductor substrate is lowered by selectively performing first wafer edge exposure on the outer peripheral region of the semiconductor substrate, and then liquid immersion exposure is performed on the resist layer. Subsequently, second wafer edge exposure is performed on the outer peripheral region of the circular semiconductor substrate, and then the resist layer, on which the first wafer edge exposure, the liquid immersion exposure, and the second wafer edge exposure have been performed, is developed, so that the film to be processed is etched by using the developed resist layer.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A manufacturing method of a semiconductor device, comprising steps of:
 (a) providing a semiconductor substrate whose outer periphery is approximately circular;   (b) forming a first insulating film over the semiconductor substrate;   (c) forming a resist layer over the first insulating film;   (d) irradiating first exposure light to a part of the resist layer which is located in a region having a first width from the outer periphery of the semiconductor substrate;   (e) irradiating third exposure light to a part of the resist layer which is located in a region having a second width being larger than the first width from the outer periphery of the semiconductor substrate;   (f) after the steps (d) and (e), performing liquid immersion exposure in which the resist layer is irradiated with second exposure light;   (g) after the step (f), forming a resist pattern including a first pattern by removing the resist layer located in a region irradiated with the second exposure light and the third exposure light;   (h) after the step (g), etching the first insulating film such that the first insulating film has the first pattern;   (i) after the step (h), forming a trench in the semiconductor substrate by using the first pattern as a mask;   (j) after the step (i), forming a second insulating film over the semiconductor substrate including inside of the trench; and   (k) after the step (j), polishing the second insulating film by CMP method, thereby the second insulating film being outside of the trench is removed and the second insulating film being inside of the trench is kept.

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