Device and Method for Encoding a Signal on Alternating Current Lines

Abstract

A smart dimming network encoder is connected to an alternating current power source having a substantially regular period of cycles. The encoder includes a bipolar switch connecting the alternating current power source to a modified alternating current line, the bipolar switch having an on state permitting the modified alternating current line to conduct alternating current from the alternating current power source and an off state preventing conduction on the modified alternating current line. The encoder includes a processor coupled to the bipolar switch, the processor configured to receive a control signal at a control signal input and to switch the bipolar switch to the off state for an off time having a duration corresponding to the control signal.

What is claimed is: 
     
         1 . A decoder connected to a modified alternating current line having a modified alternating current signal, the decoder comprising:
 a processor configured to sense an off time in the modified alternating current signal and to emit a control signal based on the detected off time.   
     
     
         2 . The decoder of  claim 1 , wherein the control signal is a pulse-width modulated signal. 
     
     
         3 . The decoder of  claim 2  further comprising a pulse-width modulation to direct current converter that converts the pulse width modulated signal into a voltage control signal. 
     
     
         4 . The decoder of  claim 3 , wherein the pulse-width modulation to direct current converter further comprises at least one resistor and at least one capacitor, the at least one resistor and capacitor configured to average the pulse width modulated signal to produce a corresponding voltage control signal. 
     
     
         5 . The decoder of  claim 4 , wherein the pulse-width modulation to direct current converter further comprises an amplifier having a gain that maps the voltage control signal onto a voltage range. 
     
     
         6 . The decoder of  claim 1 , wherein the processor senses the off time by detecting when the modified alternating current signal drops below a first threshold and detecting when the modified alternating current signal subsequently exceeds above a second threshold. 
     
     
         7 . The decoder of  claim 6  further comprising a comparator with an input sampling the modified alternating current signal and an output coupled to the processor, the comparator configured to switch to a first logic level at the first threshold and to switch to a second logic level at the second threshold. 
     
     
         8 . The decoder of  claim 6  further comprising a resistive divider that divides the modified alternating current signal to provide a signal having a predetermined amplitude to the processor. 
     
     
         9 . The decoder of  claim 8 , wherein the resistive divider is adjustable to produce the predetermined amplitude from at least two different modified alternating current signal amplitudes. 
     
     
         10 . The decoder of  claim 8 , wherein the resistive divider is a first resistive divider configured to reduce a first modified alternating current signal amplitude to the predetermined amplitude, and further comprising a second resistive divider that may be alternatively connected to the decoder to reduce a second modified alternating current signal amplitude to the predetermined amplitude. 
     
     
         11 . The decoder of  claim 1  wherein the modified alternating current signal is provided to the decoder by way of a rectifier. 
     
     
         12 . The decoder of  claim 1  further comprising a driver, the driver comprising:
 a control signal input configured to receive the control signal; and 
 at least one current regulator coupled to the control signal input, the at least one current regulator connecting the modified alternating current line to at least one load, the at least one current regulator configured to regulate the current to the at least one load in response to the control signal. 
 
     
     
         13 . The decoder of  claim 12  wherein the at least one current regulator further comprises at least one transistor that regulates the current through the modified alternating current line. 
     
     
         14 . The decoder of  claim 13  wherein the control signal is a voltage control signal, and the at least one current regulator further comprises an amplifier having an output connected to the control terminal, a non-inverting input receiving the control signal, and an inverting input receiving a voltage based on the current in the modified alternating current line as regulated by the transistor. 
     
     
         15 . The decoder of  claim 12 , wherein the driver further comprises a rectifier that rectifies the modified alternating current signal. 
     
     
         16 . The decoder of  claim 15  wherein the rectifier of the driver provides the modified alternating current signal to the decoder. 
     
     
         17 . A method for decoding a modified alternating current signal, the method comprising:
 sensing, by a processor coupled to a modified alternating current line having a modified alternating current signal, an off time in the modified alternating current signal; and   emitting, by the processor, a control signal based on the detected off time.   
     
     
         18 . The method of  claim 17 , wherein sensing the off time further comprises:
 detecting when the modified alternating current signal drops below a first threshold; and   detecting when the modified alternating current signal subsequently exceeds above a second threshold.   
     
     
         19 . The method of  claim 17 , wherein emitting the control signal further comprises emitting a pulse width modulated signal. 
     
     
         20 . The method of  claim 19  further comprising:
 mapping, by the processor, the off time to a voltage level of a voltage control signal; and 
 transmitting, by the processor, a series of pulses having an average voltage level substantially equal to the mapped voltage level. 
 
     
     
         21 . The method of  claim 17 , wherein emitting the control signal further comprises:
 sensing a plurality of off-times in the modified alternating current signal;   calculating an average of the plurality of off times; and   emitting the control signal based on the calculated average.