Data processing device and method of computing the cosine transform of a matrix

Abstract

A data processing device provides for registers which can be formatted as segments containing numbers to which operations can be applied in SIMD fashion. In addition it is possible to perform operations which combine different segments of one register or segments at different positions in the different registers. By providing specially selected it is thus made possible to perform multidimensional separable transformations (like the 2-dimensional IDCT) without transposing the numbers in the registers.

1 . A data processing device comprising:
 an operand storage circuit arranged to store a plurality of operands, wherein each operand comprises a first half and a second half; and   an arithmetic circuit, wherein the arithmetic circuit is arranged to perform a first operation and a second operation,   wherein the first operation combines a first half of a first operand of the plurality of operands with a second half of a second operand of the plurality of operands,   wherein the second operation combines a second half of a first operand of the plurality of operands with a first half of a second operand of the plurality of operands,   wherein the first operation and the second operation are selected from the group consisting of addition and subtraction,   wherein the first operation and the second operation are different,   wherein the first operation and the second operation are executed in parallel,   wherein the first operation and the second operation are executed independently of one another,   wherein the first operation produces a first half of a result operand of the plurality of operands,   wherein the second operation produces a second half of a result operand of the plurality of operands.