US2018212590A1PendingUtilityA1

Glitch Mitigation in Switched Reactance Phase Shifters

Assignee: PSEMI CORPPriority: Jan 24, 2017Filed: Jan 24, 2017Published: Jul 26, 2018
Est. expiryJan 24, 2037(~10.4 yrs left)· nominal 20-yr term from priority
H03H 7/20H03H 11/20
54
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Claims

Abstract

A phase shifter cell and multiple coupled phase shifter cells that mitigate signal glitches arising from phase state changes by a combination of design architecture and control signal timing. Specifically, one or more of the following three concepts are employed to mitigate insertion loss glitches and control phase behavior during phase state transitions: the timing of switching for each switched half-cell (e.g., including series and/or shunt reactance elements, such as inductors and/or capacitors) within a phase shifter cell is controlled in such a way that the reactance elements do not all switch at the same time; use of a “make before break” timing scheme for combination or “multi-state” phase shifter cells; and/or arranging the timing of each phase shifter cell in a set of multiple coupled phase shifter cells such that the individual cells do not all switch at the same time.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A phase shifter cell having at least two phase shift states defined by two or more series reactances and two or more shunt reactances, wherein when transitioning from a first phase shift state to a next phase shift state, the sum of the series reactances is controlled so as to progress monotonically in a first direction, the sum of the shunt reactances is controlled so as to progress monotonically in a second direction opposite the first direction, and the sum of the normalized series and shunt reactances is minimized. 
     
     
         2 . A phase shifter cell having at least two phase shift states and a through-path state, wherein when switching from a first phase shift state to a next phase shift state, the phase shifter cell is set to the through-path state before being set to the next phase shift state. 
     
     
         3 . A phase shifter cell including at least two series-coupled selectable half-cells, each selectable half-cell having an active phase shifting state and an inactive state, wherein when switching from a first selectable half-cell initially in the active phase shifting state to a next selectable half-cell initially in the inactive state, the first selectable half-cell is set to the inactive state before the next selectable half-cell is set to the active phase shifting state. 
     
     
         4 . A phase shifter cell including:
 (a) at least two series-coupled selectable half-cells, each selectable half-cell having an active phase shifting state and an inactive state; and   (b) a control signal generation circuit coupled to the selectable half-cells, and configured to be coupled to a master control signal, for generating a sequence of time-delayed control signals for the selectable half-cells such that when switching from a first selectable half-cell initially in the active phase shifting state to a next selectable half-cell initially in the inactive state, the first selectable half-cell is set to the inactive state before the next selectable half-cell is set to the active phase shifting state.   
     
     
         5 . The invention of  claim 4 , wherein at least one selectable half-cell has a pi-type configuration. 
     
     
         6 . The invention of  claim 4 , wherein at least one selectable half-cell has a T-type configuration. 
     
     
         7 . The invention of  claim 4 , wherein the control signal generation circuit is configured to delay generating the time-delayed control signals for a selectable period time. 
     
     
         8 . A phase shifter cell including at least two selectable signal paths, each selectable signal path having an active state and an inactive state, wherein a first selectable signal path initially in the active state remains in the active state for a selected period of time when a next selectable signal path is set to the active state, and thereafter the first selectable signal path is set to the inactive state. 
     
     
         9 . A phase shifter cell including:
 (a) a phase shifter circuit having at least two selectable signal paths, each selectable signal path having an active state and an inactive state; and   (b) a control signal generation circuit coupled to the selectable signal paths of the phase shifter circuit, and configured to be coupled to a master control signal, for generating a sequence of time-delayed control signals for the selectable signal paths such that when switching from a first selectable signal path initially in the active state to a next selectable signal path initially in the inactive state, the first selectable signal path remains in the active state for a selected period of time while the next selectable signal path is set to the active state, and thereafter the first selectable signal path is set to the inactive state.   
     
     
         10 . A phase shifter cell including at least two selectable signal paths and a selectable reference path, each selectable signal path and the selectable reference path having an active state and an inactive state, wherein:
 (a) a first selectable signal path initially in the active state remains in the active state for a selected period of time when a next selectable signal path is to be set to the active state;   (b) the selectable reference path is set to the active state during the selected period of time and before the next selectable signal path is set to the active state;   (c) the next selectable signal path is set to the active state and the first selectable signal path is set to the inactive state; and   (d) thereafter the selectable reference path is set to the inactive state.   
     
     
         11 . The invention of  claim 10 , wherein the first selectable signal path has an opposite phase shift polarity with respect to the next selectable signal path. 
     
     
         12 . A phase shifter cell including:
 (a) a phase shifter circuit having at least two selectable signal paths and a selectable reference path, each selectable signal path and the selectable reference path having an active state and an inactive state; and   (b) a control signal generation circuit coupled to the selectable signal paths of the phase shifter circuit, and configured to be coupled to a master control signal, for generating a sequence of time-delayed control signals for the selectable signal paths such that when switching from a first selectable signal path initially in the active state to a next selectable signal path initially in the inactive state, the first selectable signal path remains in the active state for a selected period of time while the selectable reference path is set to the active state, and thereafter the next selectable signal path is set to the active state and the first selectable signal path is set to the inactive state, and thereafter the selectable reference path is set to the inactive state.   
     
     
         13 . A plurality of series-coupled phase shifter cells each providing at least one selectable phase shift state, wherein each phase shifter cell has a switching delay time distinct from the switching delay time of at least one other phase shifter cell so as to mitigate transients arising from selection of a phase shift state. 
     
     
         14 . The invention of  claim 13 , wherein the at least one selectable phase shift state of at least one phase shifter cell includes at least two phase shifting states and a through-path state, wherein when switching from a first phase shifting state to a next phase shifting state, the at least one phase shifter cell is set to the through-path state before being set to the next phase shifting state. 
     
     
         15 . The invention of  claim 13 , wherein at least one phase shifter cell includes at least two selectable signal paths, each selectable signal path having an active state and an inactive state, wherein a first selectable signal path initially in the active state remains in the active state for a selected period of time when a next selectable signal path is set to the active state, and thereafter the first selectable signal path is set to the inactive state. 
     
     
         16 . The invention of  claim 13 , wherein:
 (a) the at least one selectable phase shift state of at least one phase shifter cell includes at least two phase shifting states and a through-path state, wherein when switching from a first phase shifting state to a next phase shifting state, the at least one phase shifter cell is set to the through-path state before being set to the next phase shifting state; and   (b) at least one phase shifter cell includes at least two selectable signal paths, each selectable signal path having an active state and an inactive state, wherein a first selectable signal path initially in the active state remains in the active state for a selected period of time when a next selectable signal path is set to the active state, and thereafter the first selectable signal path is set to the inactive state.   
     
     
         17 . The invention of  claim 13 , wherein at least one phase shifter cell includes at least two selectable signal paths and a selectable reference path, each selectable signal path and the selectable reference path having an active state and an inactive state, wherein:
 (a) a first selectable signal path initially in the active state remains in the active state for a selected period of time when a next selectable signal path is to be set to the active state;   (b) the selectable reference path is set to the active state during the selected period of time and before the next selectable signal path is set to the active state;   (c) the next selectable signal path is set to the active state and the first selectable signal path is set to the inactive state; and   (d) thereafter the selectable reference path is set to the inactive state.   
     
     
         18 . The invention of  claim 17 , wherein the first selectable signal path has an opposite phase shift polarity with respect to the next selectable signal path. 
     
     
         19 . A method for mitigating signal transients arising from phase state changes in a phase shifter cell having at least two phase shift states defined by two or more series reactances and two or more shunt reactances, including:
 (a) controlling the sum of the series reactances so as to progress monotonically in a first direction while transitioning from a first phase shift state to a next phase shift state;   (b) controlling the sum of the shunt reactances so as to progress monotonically in a second direction opposite the first direction while transitioning from the first phase shift state to the next phase shift state; and   (c) minimizing the sum of the normalized series and shunt reactances while transitioning from the first phase shift state to the next phase shift state.   
     
     
         20 . A method for mitigating signal transients arising from phase state changes in a phase shifter cell having at least two phase shift states and a through-path state, including:
 (a) switching from a first phase shift state to the through-path state before switching to a next phase shift state; and   (b) thereafter switching from the through-path state to the next phase shift state.   
     
     
         21 . A method for mitigating signal transients arising from phase state changes in a phase shifter cell having at least two series-coupled selectable half-cells, each selectable half-cell having an active phase shifting state and an inactive state, including:
 (a) switching a first selectable half-cell initially in the active phase shifting state to an inactive state;   (b) thereafter, setting a next selectable half-cell to the active phase shifting state.   
     
     
         22 . A method for mitigating signal transients arising from phase state changes in a phase shifter cell including at least two selectable signal paths, each selectable signal path having an active state and an inactive state, including:
 (a) for a first selectable signal path initially in the active state, maintaining that signal path in the active state when a next selectable signal path is to be set to the active state;   (b) setting the next selectable signal path to the active state; and   (c) thereafter setting the first selectable signal path to the inactive state.   
     
     
         23 . A method for mitigating signal transients arising from phase state changes in a phase shifter cell including at least two selectable signal paths and a selectable reference path, each selectable signal path and the selectable reference path having an active state and an inactive state, including:
 (a) for a first selectable signal path initially in the active state, maintaining that signal path in the active state when a next selectable signal path is to be set to the active state;   (b) setting the selectable reference path to the active state during the selected period of time and before the next selectable signal path is set to the active state;   (c) setting the next selectable signal path to the active state and the first selectable signal path is set to the inactive state; and   (d) thereafter setting the selectable reference path to the inactive state.   
     
     
         24 . A method for mitigating signal transients arising from phase state changes in a plurality of series-coupled phase shifter cells, including:
 (a) configuring each phase shifter cell to provide at least one selectable phase shift state; and   (b) configuring each phase shifter cell with a switching delay time distinct from the switching delay time of at least one other phase shifter cell so as to mitigate transients arising from selection of a phase shift state.

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