Transistor and display device

Abstract

To provide a transistor having a favorable electric characteristics and high reliability and a display device including the transistor. The transistor is a bottom-gate transistor formed using an oxide semiconductor for a channel region. An oxide semiconductor layer subjected to dehydration or dehydrogenation through heat treatment is used as an active layer. The active layer includes a first region of a superficial portion microcrystallized and a second region of the rest portion. By using the oxide semiconductor layer having such a structure, a change to an n-type, which is attributed to entry of moisture to the superficial portion or elimination of oxygen from the superficial portion, and generation of a parasitic channel can be suppressed. In addition, contact resistance between the oxide semiconductor layer and source and drain electrodes can be reduced.

1 . (canceled) 
     
     
         2 . A semiconductor device comprising:
 an oxide semiconductor layer over a first insulating layer, the oxide semiconductor layer including a first region and a second region, the first region being located over the second region;   a gate electrode adjacent to the oxide semiconductor layer;   a source electrode over and in electrical contact with the oxide semiconductor layer;   a drain electrode over and in electrical contact with the oxide semiconductor layer; and   a second insulating layer over and in contact with at least a portion of the oxide semiconductor layer between the source electrode and the drain electrode,   wherein the first region has a c-axis oriented crystalline structure, and   wherein the second region has nano crystals.   
     
     
         3 . The semiconductor device according to  claim 2 , wherein the oxide semiconductor layer comprises indium, gallium and zinc. 
     
     
         4 . The semiconductor device according to  claim 2 , wherein the second region includes an amorphous region. 
     
     
         5 . The semiconductor device according to  claim 2 , wherein the oxide semiconductor layer is formed over the gate electrode with first insulating film interposed therebetween. 
     
     
         6 . The semiconductor device according to  claim 2 , wherein the first region is in contact with the second insulating layer. 
     
     
         7 . A semiconductor device comprising:
 an oxide semiconductor layer over a first insulating layer, the oxide semiconductor layer including a first region and a second region, the first region being located over the second region;   a gate electrode adjacent to the oxide semiconductor layer;   a source electrode over and in electrical contact with the oxide semiconductor layer;   a drain electrode over and in electrical contact with the oxide semiconductor layer; and   a second insulating layer over and in contact with at least a portion of the oxide semiconductor layer between the source electrode and the drain electrode,   wherein the first region has a c-axis oriented crystalline structure, and   wherein the second region includes a crystal of which grain size is from 1 nm to 200 nm.   
     
     
         8 . The semiconductor device according to  claim 7 , wherein the oxide semiconductor layer comprises indium, gallium and zinc. 
     
     
         9 . The semiconductor device according to  claim 7 , wherein the second region includes an amorphous region. 
     
     
         10 . The semiconductor device according to  claim 7 , wherein the oxide semiconductor layer is formed over the gate electrode with first insulating film interposed therebetween. 
     
     
         11 . The semiconductor device according to  claim 7 , wherein the first region is in contact with the second insulating layer. 
     
     
         12 . A semiconductor device comprising:
 an oxide semiconductor layer over a first insulating layer, the oxide semiconductor layer including a first region and a second region, the first region being located over the second region;   a gate electrode adjacent to the oxide semiconductor layer;   a source electrode over and in electrical contact with the oxide semiconductor layer;   a drain electrode over and in electrical contact with the oxide semiconductor layer; and   a second insulating layer over and in contact with at least a portion of the oxide semiconductor layer between the source electrode and the drain electrode,   wherein the first region has a c-axis oriented crystalline structure, and   wherein the second region has a different crystalline state from the first region.   
     
     
         13 . The semiconductor device according to  claim 12 , wherein the oxide semiconductor layer comprises indium, gallium and zinc. 
     
     
         14 . The semiconductor device according to  claim 12 , wherein the second region includes an amorphous region. 
     
     
         15 . The semiconductor device according to  claim 12 , wherein the oxide semiconductor layer is formed over the gate electrode with first insulating film interposed therebetween. 
     
     
         16 . The semiconductor device according to  claim 12 , wherein the first region is in contact with the second insulating layer.