Active reset circuit for reset spread reduction in single-slope adc

Abstract

An image sensor comprises a pixel circuit including a reset transistor and configured to output a pixel signal; and a differential comparator including a pixel input, a reference input, and a comparator output, wherein one of a source or a drain of the reset transistor is connected to the comparator output. In this manner, an active reset method may be incorporated in the image sensor.

What is claimed is: 
     
         1 . An image sensor, comprising:
 a pixel circuit including a reset transistor and an amplification transistor, the pixel circuit configured to output a pixel signal;   an amplifier including a pixel input and an amplifier output;   a capacitor connected to one of a source or a drain of the reset transistor and to the amplification transistor;   a first signal line connected to the pixel circuit and to the amplifier; and   a second signal line connected to the other of the source or the drain of the reset transistor and to the amplifier output.   
     
     
         2 . The image sensor according to  claim 1 , wherein the capacitor is connected to a gate of the amplification transistor. 
     
     
         3 . The image sensor according to  claim 2 , wherein the amplifier is configured to receive the pixel signal at the pixel input and to receive a reference signal at a reference input. 
     
     
         4 . The image sensor according to  claim 1 , further comprising a correlated double sampling (CDS) circuit, wherein:
 the CDS circuit is configured to perform a P-phase measurement corresponding to a reset level of the pixel circuit, and   the CDS circuit is configured to subsequently perform a D-phase measurement corresponding to a data level of the pixel circuit.   
     
     
         5 . The image sensor according to  claim 4 , wherein the CDS circuit is configured to calculate a difference between the P-phase measurement and the D-phase measurement. 
     
     
         6 . The image sensor according to  claim 1 , wherein a gate of the reset transistor is configured to receive a high reset level, an intermediate reset level, and a low reset level in this order. 
     
     
         7 . The image sensor according to  claim 6 , wherein the high reset level and the intermediate reset level are higher than a gate threshold of the reset transistor, and the low reset level is lower than the gate threshold of the reset transistor. 
     
     
         8 . The image sensor according to  claim 1 , wherein the pixel circuit further includes a photodiode and a transfer transistor. 
     
     
         9 . The image sensor according to  claim 8 , wherein the pixel circuit further includes a selection transistor. 
     
     
         10 . The image sensor according to  claim 1 , wherein
 the pixel circuit is one of a plurality of pixel circuits arranged in a matrix, and   the amplifier corresponds to a plurality of columns of the matrix.   
     
     
         11 . An image processing method, comprising:
 outputting a pixel signal via a first signal line from a pixel circuit, the pixel circuit including a reset transistor, an amplification transistor, and a capacitor connected to one of a source or a drain of the reset transistor and to the amplification transistor; and   outputting an amplifier signal via a second signal line from an amplifier, the amplifier including a pixel input and an amplifier output,   wherein the second signal line is connected to the other of the source or the drain of the reset transistor.   
     
     
         12 . The image processing method according to  claim 11 , wherein the capacitor is connected to a gate of the amplification transistor. 
     
     
         13 . The image processing method according to  claim 12 , further comprising receiving the pixel signal at the pixel input and to receiving a reference signal at a reference input of the amplifier. 
     
     
         14 . The image processing method according to  claim 11 , further comprising:
 performing a P-phase measurement corresponding to a reset level of the pixel circuit; and   thereafter performing a D-phase measurement corresponding to a data level of the pixel circuit.   
     
     
         15 . The image processing method according to  claim 14 , further comprising calculating a difference between the P-phase measurement and the D-phase measurement. 
     
     
         16 . The image processing method according to  claim 11 , further comprising:
 receiving, at a gate of the reset transistor, a high reset level, an intermediate reset level, and a low reset level in this order.   
     
     
         17 . The image processing method according to  claim 16 , wherein the high reset level and the intermediate reset level are higher than a gate threshold of the reset transistor, and the low reset level is lower than the gate threshold of the reset transistor. 
     
     
         18 . The image processing method according to  claim 11 , wherein the pixel circuit further includes a photodiode and a transfer transistor. 
     
     
         19 . The image processing method according to  claim 18 , wherein the pixel circuit further includes a selection transistor. 
     
     
         20 . The image processing method according to  claim 11 , wherein
 the pixel circuit is one of a plurality of pixel circuits arranged in a matrix, and   the amplifier corresponds to a plurality of columns of the matrix.