Display device

Abstract

A display device includes a display panel including a plurality of pixels which are connected to a plurality of gate lines and a plurality of data lines and display a plurality of consecutive frames of images, a data driver driving the data lines, a gate driver driving the gate lines, a clock generator outputting a gate clock signal, which drives the gate driver and swings between a gate-on voltage and a gate-off voltage, and a signal controller outputting a gate pulse signal which drives the clock generator and a data control signal which controls the data driver. The clock generator includes a voltage maintainer maintaining the gate clock signal at a reference voltage that has a fixed value between the gate-on voltage and the gate-off voltage for a predetermined time.

What is claimed is: 
     
         1 . A display device, comprising:
 a display panel including a plurality of pixels which are connected to a plurality of gate lines and a plurality of data lines and display a plurality of consecutive frames of images;   a data driver which drives the data lines;   a gate driver which drives the gate lines;   a clock generator which outputs a gate clock signal which drives the gate driver and swings between a gate-on voltage and a gate-off voltage; and   a signal controller which outputs a gate pulse signal which drives the clock generator and a data control signal which controls the data driver,   wherein the clock generator includes a voltage maintainer which maintains the gate clock signal at a reference voltage that has a fixed value between the gate-on voltage and the gate-off voltage for a predetermined time.   
     
     
         2 . The display device of  claim 1 , wherein the voltage maintainer maintains the gate clock signal at the reference voltage during a blank period between two consecutive frames among the plurality of consecutive frames. 
     
     
         3 . The display device of  claim 1 , wherein the voltage maintainer receives the gate-on voltage and the gate-off voltage and outputs the reference voltage by dividing the gate-on voltage and the gate-off voltage. 
     
     
         4 . The display device of  claim 3 , wherein the reference voltage is a median value of the gate-on voltage and the gate-off voltage. 
     
     
         5 . The display device of  claim 1 , wherein
 the clock generator provides a gate clock bar signal to the gate driver, and   the gate clock signal and the gate clock bar signal are opposite in phase and are symmetrical to each other.   
     
     
         6 . The display device of  claim 1 , wherein the clock generator further includes a gate clock generator which generates the gate clock signal using the gate-on voltage and the gate-off voltage. 
     
     
         7 . The display device of  claim 6 , wherein the gate clock generator includes a first switching circuit which provides one of the gate-on voltage and the gate-off voltage to an output terminal of the clock generator in response to the gate pulse signal. 
     
     
         8 . The display device of  claim 6 , wherein the gate clock generator includes a charge sharer which makes a voltage provided to an output terminal of the clock generator swing. 
     
     
         9 . The display device of  claim 8 , wherein an output terminal of the voltage maintainer is connected to the charge sharer. 
     
     
         10 . The display device of  claim 8 , wherein the gate clock generator further includes a second switching circuit which connects the output terminal of the clock generator to one of the charge sharer and a first switching circuit which provides one of the gate-on voltage and the gate-off voltage in response to the gate pulse signal. 
     
     
         11 . The display device of  claim 8 , wherein the gate clock generator further includes a third switching circuit which provides one of the gate-on voltage and the gate-off voltage to the charge sharer in response to the gate pulse signal. 
     
     
         12 . A display device, comprising:
 a display panel including a plurality of pixels which are connected to a plurality of gate lines and a plurality of data lines and display a plurality of consecutive frames of images;   a data driver which drives the data lines;   a gate driver which drives the gate lines;   a clock generator which outputs a gate clock signal which drives the gate driver and swings between a gate-on voltage and a gate-off voltage; and   a signal controller which outputs a gate pulse signal which drives the clock generator and a data control signal which controls the data driver,   wherein the clock generator includes an impedance control circuit which controls a slew rate of the gate clock signal.   
     
     
         13 . The display device of  claim 12 , wherein the clock generator further includes a gate clock generator which generates the gate clock signal using the gate-on voltage and the gate-off voltage. 
     
     
         14 . The display device of  claim 13 , wherein the gate clock generator includes a first switching circuit which provides one of the gate-on voltage and the gate-off voltage in response to the gate pulse signal, a charge sharer which provides a voltage which swings between the gate-on voltage and the gate-off voltage, and a second switching circuit which connects an output terminal of the clock generator to one of the charge sharer and the first switching circuit in response to the gate pulse signal. 
     
     
         15 . The display device of  claim 14 , wherein
 the impedance control circuit includes a first impedance control circuit which controls the slew rate of the gate clock signal during a period when the gate clock signal swings from one of the gate-on voltage and the gate-off voltage to a reference voltage between the gate-on voltage and the gate-off voltage, and   the first impedance control circuit is connected between the second switching circuit and the charge sharer.   
     
     
         16 . The display device of  claim 14 , wherein
 the impedance control circuit includes a second impedance control circuit which controls the slew rate of the gate clock signal during a period when the gate clock signal swings from a reference voltage between the gate-on voltage or the gate-off voltage to one of the gate-on voltage and the gate-off voltage, and   the second impedance control circuit is connected between the first and second switching circuits.   
     
     
         17 . A display device, comprising:
 a display panel including a plurality of pixels which are connected to a plurality of gate lines and a plurality of data lines and display a plurality of consecutive frames of images;   a data driver which drives the data lines;   a gate driver which drives the gate lines;   a clock generator which outputs a gate clock signal which drives the gate driver and swings between a gate-on voltage and a gate-off voltage; and   a signal controller which outputs a gate pulse signal which drives the clock generator and a data control signal which controls the data driver,   wherein the clock generator includes an impedance control circuit which delays or advance the gate clock signal.   
     
     
         18 . The display device of  claim 17 , wherein the clock generator further includes a gate clock generator which generates the gate clock signal using the gate-on voltage and the gate-off voltage. 
     
     
         19 . The display device of  claim 18 , wherein the gate clock generator includes a first switching circuit which provides one of the gate-on voltage and the gate-off voltage in response to the gate pulse signal, a charge sharer which provides a voltage which swings between the gate-on voltage and the gate-off voltage, and a second switching circuit which connects an output terminal of the clock generator to one of the charge sharer and the first switching circuit in response to the gate pulse signal. 
     
     
         20 . The display device of  claim 19 , wherein the impedance control circuit is connected between the second switching circuit and the output terminal of the clock generator.