Method And Apparatus For Controlling Data Migration In Multi-Channel Memory Device

Abstract

A memory system has a memory device and a data migration control circuit. The memory device has a plurality of memory spaces accessed via a plurality of memory channels, respectively. The data migration control circuit controls a first stored data in a second memory space to migrate to a first memory space. When a first data piece of the first stored data is requested during data migration of the first data piece, the data migration control circuit blocks data access of the first data piece until the first data piece is fully stored into the first memory space, where a size of the first data piece is smaller than a size of the first stored data.

What is claimed is: 
     
         1 . A memory system, comprising:
 a memory device comprising a plurality of memory spaces accessed via a plurality of memory channels, respectively; and   a data migration control circuit capable of:
 detecting whether the memory device is switched from a first bandwidth scenario to a second bandwidth scenario; and 
 controlling a first stored data in a second memory space of the memory spaces to migrate to a first memory space of the memory spaces responsive to detecting that the memory device is switched from the first bandwidth scenario to the second bandwidth scenario, 
   wherein the first bandwidth scenario and the second bandwidth scenario have different memory bandwidth requirements.   
     
     
         2 . The memory system of  claim 1 , wherein the data migration control circuit comprises:
 a direct memory access (DMA) controller capable of:
 divide the first stored data into a plurality of data pieces; and 
 transferring the data pieces from the second memory space to the first memory space; and 
   a translation table capable of recording mapping between original addresses of the data pieces in the second memory space and new addresses of the data pieces in the first memory space.   
     
     
         3 . The memory system of  claim 2 , wherein:
 when a first data piece of the first stored data is requested during data migration of the first data piece, the data migration control circuit blocks data access of the first data piece until the first data piece is fully stored into the first memory space,   a size of the first data piece is smaller than a size of the first stored data, and   when receiving a physical address of the first data piece in the second memory space during the data migration of the first data piece, the translation table performs translation of the physical address of the first data piece in the second memory space to a physical address of the first data piece in the first memory space after the first data piece is fully stored into the first memory space.   
     
     
         4 . The memory system of  claim 1 , wherein:
 the data migration control circuit is further capable of swapping the first stored data in the second memory space and a second stored data in the first memory space,   when a second data piece of the second stored data is requested during data migration of the second data piece from the first memory space to the second memory space, the data migration control circuit blocks data access of the second data piece until the second data piece is fully stored into the second memory space, and   a size of the second data piece is smaller than a size of the second stored data.   
     
     
         5 . The memory system of  claim 1 , wherein:
 each of the first memory space and the second memory space includes a first memory rank and a second memory rank,   memory addresses assigned to the first memory rank are lower than memory addresses assigned to the second memory rank, and   the data migration control circuit is further capable of controlling the first stored data to migrate from the first memory rank of the second memory space to the first memory rank of the first memory space.   
     
     
         6 . The memory system of  claim 5 , wherein:
 the first memory rank of the first memory space further has a second stored data, and   before data migration of the first stored data is performed, the first stored data and the second stored data are stored into the second memory space and the first memory space under a cascade memory access mode.   
     
     
         7 . The memory system of  claim 5 , wherein:
 the first memory rank of the first memory space further has a second stored data, and   before data migration of the first stored data is performed, the first stored data and the second stored data are stored into the second memory space and the first memory space under an interleaving memory access mode.   
     
     
         8 . The memory system of  claim 1 , wherein:
 each of the first memory space and the second memory space includes a first memory rank and a second memory rank,   memory addresses assigned to the first memory rank are lower than memory addresses assigned to the second memory rank, and   the data migration control circuit is further capable of controlling the first stored data to migrate from the first memory rank of the second memory space to the second memory rank of the first memory space.   
     
     
         9 . The memory system of  claim 8 , wherein:
 the first memory rank of the first memory space further has a second stored data, and   before data migration of the first stored data is performed, the first stored data and the second stored data are stored into the second memory space and the first memory space under an interleaving memory access mode.   
     
     
         10 . The memory system of  claim 1 , wherein the data migration control circuit further comprises:
 a data piece access controller configured to store at least a migration pointer,   wherein the migration pointer is maintained by the DMA controller for indicating a location of a migration zone where the DMA controller is currently working upon, and   wherein the migration zone is defined in at least one of the first memory space and the second memory space.   
     
     
         11 . The memory system of  claim 10 , wherein:
 the migration zone is defined in the first memory space,   the data piece access controller is further capable of checking the migration pointer to determine if the requested first data piece is currently being migrated to the migration zone pointed to by the migration pointer, and   when determining that the first data piece is currently being migrated to the migration zone, the data piece access controller blocks data access of the first data piece until the first data piece is fully stored into the migration zone.   
     
     
         12 . The memory system of  claim 10 , wherein:
 the migration zone is defined in the second memory space,   the data piece access controller is further capable of checking the migration pointer to determine if the requested first data piece is currently being migrated from the migration zone pointed to by the migration pointer, and   when determining that the first data piece is currently being migrated from the migration zone, the data piece access controller blocks data access of the first data piece until the first data piece is fully copied or moved from the migration zone.   
     
     
         13 . A method, comprising:
 detecting whether a memory device is switched from a first bandwidth scenario to a second bandwidth scenario, wherein the memory device comprises a plurality of memory spaces accessed via a plurality of memory channels, respectively, and wherein the first bandwidth scenario and the second bandwidth scenario have different memory bandwidth requirements; and   responsive to detecting that the memory device is switched from the first bandwidth scenario to the second bandwidth scenario, controlling a first stored data in a second memory space of the memory spaces to migrate to a first memory space of the memory spaces.   
     
     
         14 . The method of  claim 13 , further comprising:
 when a first data piece of the first stored data is requested during data migration of the first data piece, blocking data access of the first data piece until the first data piece is fully stored into the first memory space; and   utilizing a translation table to record mapping between original addresses of the data pieces in the second memory space and new addresses of the data pieces in the first memory space,   wherein a size of the first data piece is smaller than a size of the first stored data,   wherein the controlling of the first stored data in the second memory space of the memory spaces to migrate to the first memory space of the memory spaces comprises:
 dividing the first stored data into a plurality of data pieces; and 
 transferring the data pieces from the second memory space to the first memory space through direct memory access (DMA), 
   wherein the blocking of the data access of the first data piece comprises, when receiving a physical address of the first data piece in the second memory space during the data migration of the first data piece, blocking the translation table from translating the physical address of the first data piece in the second memory space to a physical address of the first data piece in the first memory space until the first data piece is fully stored into the first memory space.   
     
     
         15 . The method of  claim 13 , wherein:
 the controlling of the first stored data in the second memory space of the memory spaces to migrate to the first memory space of the memory spaces comprises swapping the first stored data in the second memory space and a second stored data in the first memory space, and   the method further comprises when a second data piece of the second stored data is requested during data migration of the second data piece from the first memory space to the second memory space, blocking data access of the second data piece until the second data piece is fully stored into the second memory space, and   a size of the second data piece is smaller than a size of the second stored data.   
     
     
         16 . The method of  claim 13 , wherein:
 each of the first memory space and the second memory space includes a first memory rank and a second memory rank,   memory addresses assigned to the first memory rank are lower than memory addresses assigned to the second memory rank, and   the controlling of the first stored data in the second memory space of the memory spaces to migrate to the first memory space of the memory spaces comprises either of:
 controlling the first stored data to migrate from the first memory rank of the second memory space to the first memory rank of the first memory space; or 
 controlling the first stored data to migrate from the first memory rank of the second memory space to the second memory rank of the first memory space. 
   
     
     
         17 . The method of  claim 16 , wherein:
 the first memory rank of the first memory space further has a second stored data, and   the method further comprises, before data migration of the first stored data is performed, storing the first stored data and the second stored data into the second memory space and the first memory space under a cascade memory access mode or an interleaving memory access mode.   
     
     
         18 . The method of  claim 14 , further comprising:
 storing at least a migration pointer maintained for indicating a location of a migration zone where the DMA is currently working upon,   wherein the migration zone is defined in at least one of the first memory space and the second memory space.   
     
     
         19 . The method of  claim 18 , wherein:
 the migration zone is defined in the first memory space, and   the blocking of the data access of the first data piece comprises:
 checking the migration pointer to determine if the requested first data piece is currently being migrated to the migration zone pointed to by the migration pointer; and 
 when determining that the first data piece is currently being migrated to the migration zone, blocking data access of the first data piece until the first data piece is fully stored into the migration zone. 
   
     
     
         20 . The method of  claim 18 , wherein:
 the migration zone is defined in the second memory space, and   the blocking of the data access of the first data piece comprises:
 checking the migration pointer to determine if the requested first data piece is currently being migrated from the migration zone pointed to by the migration pointer; and 
 when determining that the first data piece is currently being migrated from the migration zone, blocking data access of the first data piece until the first data piece is fully copied or moved from the migration zone.