Semiconductor storage device

Abstract

A semiconductor storage device includes first and second wirings that are in a first layer above the substrate, extend along a first direction, and are adjacent to each other along a second direction, third and fourth wirings that are in a second layer above the first layer, extend along the second direction, and are adjacent to each other along the first direction, first and second memory cells on the first wiring, and a third memory cell on the second wiring. The first to third memory cells each include a variable resistance element and a switching element. The switching element of the first memory cell includes a gate coupled to the third wiring. The switching elements of the second and third memory cells each include a gate coupled to the fourth wiring. The variable resistance elements of the first to third memory cells are formed with equal distances from each other.

What is claimed is: 
     
         1 . A semiconductor storage device comprising:
 a substrate;   a first wiring and a second wiring that are in a first layer above the substrate, extend along a first direction that is parallel to a surface of the substrate, and are adjacent to each other along a second direction that intersects with the first direction and is parallel to the surface of the substrate;   a third wiring and a fourth wiring that are in a second layer above the first layer, extend along the second direction, and are adjacent to each other along the first direction;   a first memory cell and a second memory cell on a surface of the first wiring; and   a third memory cell on a surface on the second wiring, wherein   the first memory cell, the second memory cell, and the third memory cell each include a variable resistance element and a switching element, the switching element of the first memory cell having a gate coupled to the third wiring, and the switching element of the second memory cell and the switching element of the third memory cell each having a gate coupled to the fourth wiring, and   the variable resistance element of the first memory cell, the variable resistance element of the second memory cell, and the variable resistance element of the third memory cell are formed with equal distances from each other in a plane parallel to the surface of the substrate.   
     
     
         2 . The semiconductor storage device according to  claim 1 , wherein the variable resistance element of the first memory cell and the variable resistance element of the second memory cell are aligned in the first direction. 
     
     
         3 . The semiconductor storage device according to  claim 2 , wherein the switching element of the second memory cell and the switching element of the third memory cell are aligned in the second direction. 
     
     
         4 . The semiconductor storage device according to  claim 2 , further comprising:
 a fourth memory cell on the surface of the second wiring, the fourth memory cell including a variable resistance element and a switching element, wherein   the switching element of the fourth memory cell includes a gate coupled to the third wiring, and   the variable resistance element of the first memory cell, the variable resistance element of the third memory cell, and the variable resistance element of the fourth memory cell are located with equal distances from each other in the plane parallel to the surface of the substrate.   
     
     
         5 . The semiconductor storage device according to  claim 4 , wherein
 the switching element of the first memory cell, the switching element of the second memory cell, and the switching element of the third memory cell are located with equal distances from each other in the plane parallel to the surface of the substrate, and   the switching element of the first memory cell, the switching element of the third memory cell, and the switching element of the fourth memory cell are located with equal distances from each other in the plane parallel to the surface of the substrate.   
     
     
         6 . The semiconductor storage device according to  claim 1 , wherein the variable resistance element of the second memory cell and the variable resistance element of the third memory cell are aligned in the second direction. 
     
     
         7 . The semiconductor storage device according to  claim 6 , wherein the switching element of the first memory cell and the switching element of the second memory cell are aligned in the first direction. 
     
     
         8 . The semiconductor storage device according to  claim 6 , further comprising:
 a fourth memory cell on the surface of the second wiring, the fourth memory cell including a variable resistance element and a switching element, wherein   the switching element of the fourth memory cell includes a gate coupled to the third wiring, and   the variable resistance element of the first memory cell, the variable resistance element of the third memory cell, and the variable resistance element of the fourth memory cell are located with equal distances from each other in the plane parallel to the surface of the substrate.   
     
     
         9 . The semiconductor storage device according to  claim 8 , wherein
 the switching element of the first memory cell, the switching element of the second memory cell, and the switching element of the third memory cell are located with equal distances from each other in the plane parallel to the surface of the substrate, and   the switching element of the first memory cell, the switching element of the third memory cell, and the switching element of the fourth memory cell are located with equal distances in the plane parallel to the surface of the substrate.   
     
     
         10 . The semiconductor storage device according to  claim 1 , wherein the switching elements are between the substrate and the variable resistance elements. 
     
     
         11 . The semiconductor storage device according to  claim 1 , wherein the variable resistance elements are between the substrate and the switching elements. 
     
     
         12 . A semiconductor storage device comprising:
 a substrate;   a first wiring and a second wiring that are in a first layer above the substrate, extend along a first direction that is parallel to a surface of the substrate, and are adjacent to each other along a second direction that intersects with the first direction and is parallel to the surface of the substrate;   a third wiring and a fourth wiring that are in a second layer above the first layer, extend along the second direction, and are adjacent to each other along the first direction;   a first memory cell between the first wiring and the third wiring;   a second memory cell between the second wiring and the third wiring; and   a third memory cell between the second wiring and the fourth wiring, wherein   the first memory cell, the second memory cell, and the third memory cell each include a variable resistance element and a switching element, and   the variable resistance element of the first memory cell, the variable resistance element of the second memory cell, and the variable resistance element of the third memory cell are located with equal distances from each other in a plane parallel to the surface of the substrate.   
     
     
         13 . The semiconductor storage device according to  claim 12 , wherein the variable resistance element of the first memory cell and the variable resistance element of the second memory cell are aligned in the second direction. 
     
     
         14 . The semiconductor storage device according to  claim 13 , wherein the switching element of the second memory cell and the switching element of the third memory cell are aligned in the first direction. 
     
     
         15 . The semiconductor storage device according to  claim 13 , further comprising:
 a fourth memory cell between the first wiring and the fourth wiring, the fourth memory cell including a variable resistance element and a switching element, wherein   the variable resistance element of the first memory cell, the variable resistance element of the third memory cell, and the variable resistance element of the fourth memory cell are located with equal distances from each other in a plane parallel to the surface of the substrate.   
     
     
         16 . The semiconductor storage device according to  claim 15 , wherein
 the switching element of the first memory cell, the switching element of the second memory cell, and the switching element of the third memory cell are located with equal distances from each other in the plane parallel to the surface of the substrate, and   the switching element of the first memory cell, the switching element of the third memory cell, and the switching element of the fourth memory cell are located with equal distances from each other in the plane parallel to the surface of the substrate.   
     
     
         17 . The semiconductor storage device according to  claim 12 , wherein the variable resistance element of the second memory cell and the variable resistance element of the third memory cell are aligned in the first direction. 
     
     
         18 . The semiconductor storage device according to  claim 17 , wherein the switching element of the first memory cell and the switching element of the second memory cell are aligned in the second direction. 
     
     
         19 . The semiconductor storage device according to  claim 18 , further comprising:
 a fourth memory cell between the first wiring and the fourth wiring, the fourth memory cell including a variable resistance element and a switching element, wherein   the variable resistance element of the first memory cell, the variable resistance element of the third memory cell, and the variable resistance element of the fourth memory cell are located with equal distances from each other in a plane parallel to the surface of the substrate.   
     
     
         20 . The semiconductor storage device according to  claim 19 , wherein
 the switching element of the first memory cell, the switching element of the second memory cell, and the switching element of the third memory cell are located with equal distances from each other in the plane parallel to the surface of the substrate, and   the switching element of the first memory cell, the switching element of the third memory cell, and the switching element of the fourth memory cell are located with equal distances from each other in the plane parallel to the surface of the substrate.