Semiconductor device, semiconductor memory and method for testing reliability of semiconductor device

Abstract

A memory controller performs a reliability test only on a memory array out of the memory array and a random number generator on receipt of a memory test command from a testing device while performing a reliability test only on the random number generator out of the memory array and the random number generator on receipt of a random number test command from the testing device.

What is claimed is: 
     
         1 . A semiconductor device comprising:
 random number generator circuitry that generates a random number; and   memory controller circuitry connected to the random number generator circuitry, the memory controller circuitry including a self-test circuit that performs a reliability test of the random number generator circuitry,   wherein the self-test circuit:   inputs a predetermined control signal to the random number generator circuitry to cause the random number generator circuitry to generate a random number value, and   checks irreproducibility of random number values, which are generated by the random number generator circuitry.   
     
     
         2 . The semiconductor device according to  claim 1 , further comprising:
 a storage, wherein   the self-test circuit stores the random number value generated by the random number generator circuitry in the storage, and checks irreproducibility of the random number values generated by the random number generator circuitry based on the random number value read from the storage.   
     
     
         3 . The semiconductor device according to  claim 2 , wherein
 a test command received from an external device by the semiconductor device contains count information for specifying a number of counts to cause the random number generator circuitry to generate the random number values, and   the self-test circuit extracts the count information from the test command and causes the random number generator circuitry to sequentially generate a plurality of random number values based on the count information.   
     
     
         4 . The semiconductor device according to  claim 3 , wherein
 the self-test circuit (i) starts checking of the random number values on receipt of input of the count information, and (ii) sends a check result to the external device on completion of checking.   
     
     
         5 . The semiconductor device according to  claim 2 , wherein
 a predetermined storage in the semiconductor device stores count information for specifying a number of counts to cause the random number generator circuitry to generate the random number values, and   the self-test circuit reads the count information from the predetermined storage and causes the random number generator circuitry to sequentially generate a plurality of random number values based on the count information.   
     
     
         6 . The semiconductor device according to  claim 5 , wherein
 the self-test circuit (i) starts checking of the random number values on receipt of input of the count information, and (ii) sends a check result to the external device on completion of checking.   
     
     
         7 . The semiconductor device according to  claim 1 , wherein
 the self-test circuit checks whether identical random number values are consecutively generated by the random number generator circuitry, as an irreproducibility check of a random number value.   
     
     
         8 . The semiconductor device according to  claim 1 , wherein
 the self-test circuit checks whether identical random number values are included in a plurality of random number values generated by the random number generator circuitry, as an irreproducibility check of a random number value.   
     
     
         9 . The semiconductor device according to  claim 1 , wherein
 the self-test circuit checks whether appearance rates of “0” and “1” in a random number value generated by the random number generator circuitry are within a predetermined allowable range, as an irreproducibility check of a random number value.   
     
     
         10 . A semiconductor memory comprising:
 random number generator circuitry that generates a random number;   memory controller circuitry connected to the random number generator circuitry; and   a storage,   the memory controller circuitry including a self-test circuit that performs a reliability test of the random number generator circuitry,   wherein the self-test circuit:   inputs a predetermined control signal to the random number generator circuitry to cause the random number generator circuitry to generate a random number value;   stores the random number value generated by the random number generator circuitry in the storage; and   checks irreproducibility of random number values, which are generated by the random number generator circuitry, based on the random number value read from the storage.   
     
     
         11 . A method for testing reliability of a semiconductor device,
 the semiconductor device including random number generator circuitry that generates a random number, and a self-test circuit that performs a reliability test of the random number generator circuitry, the method comprising:   inputting, by the self-test circuit, a predetermined control signal to the random number generator circuitry to cause the random number generator circuitry to generate a random number value, and   checking, by the self-test circuit, irreproducibility of random number values, which are generated by the random number generator circuitry.