Methods and systems for increasing surface area of multilayer ceramic capacitors

Abstract

Methods and systems to improve a multilayer ceramic capacitor using additive manufacturing are disclosed. Layers of a capacitor may be modified from its traditional planar shape to a wavy structure. The wavy shape increases surface area within a fixed volume of the capacitor, thus increasing capacitance, and may comprise smooth and repetitive oscillations without the presence of voltage-degrading sharp corners. In addition, the ends of each conductive layer do not have sharp edges, such as comprising a round corner. The one-dimensional wave pattern may run parallel to the width of the capacitor, or it may align in parallel to the length of the capacitor. In some embodiments, the wave pattern may be parallel to both the width and the length—in two dimensions—such that it forms an egg-crate shape. Further, the wavy structures may comprise of secondary or tertiary wavy structures to further increase surface area.

What is claimed is: 
     
         1 . A method, comprising:
 defining a three-dimensional geometry of a multilayer ceramic capacitor;   depositing at least one layer of slurry comprising powder material and binder on top of a powder bed,   wherein the layer comprises an insulator material or a conductor material;   drying the powder bed after deposition of each layer; and   sintering the one or more layers to form the multilayer ceramic capacitor.   
     
     
         2 . The method of  claim 1 , further comprising:
 wherein the ceramic capacitor comprises a ceramic body;   one or more dielectric layers alternately stacked with two or more conductive layers,   wherein at least one conductive layer is configured to be structurally sinusoidal,   wherein the structurally sinusoidal conductive layers are aligned in a same vertical phase when two or more conductive layers are structurally sinusoidal;   a pair of external termination disposed at opposite end portions of the body, and   wherein the two or more conductive layers are alternately coupled to an external termination of the pair of external termination.   
     
     
         3 . The method of  claim 2 , further comprising:
 wherein each structurally sinusoidal conductive layer does not comprise a sharp corner.   
     
     
         4 . The method of  claim 2 , further comprising:
 wherein a non-coupled end of a structurally sinusoidal conductive layer comprises an end that points upward, or   wherein a non-coupled end of a structurally sinusoidal conductive layer comprises an end that points downward.   
     
     
         5 . The method of  claim 2 , further comprising:
 wherein the sinusoidal structure of the conductive layer runs parallel to a width of the multilayer ceramic capacitor.   
     
     
         6 . The method of  claim 2 , further comprising:
 wherein the sinusoidal structure of the conductive layer runs parallel to a length of the multilayer ceramic capacitor.   
     
     
         7 . A method, comprising:
 depositing a slurry to form a first layer comprising conductive material;   wherein the conductive material comprises at least one of a copper, nickel, silver, palladium, gold and platinum;   depositing a slurry to form a second layer comprising dielectric material,   wherein the dielectric material comprises barium titanate;   depositing a slurry to form a third layer comprising the same material as the first layer;   drying the layers using infrared heating; and   sintering the layers to form a multilayer ceramic capacitor.   
     
     
         8 . The method of  claim 7 , further comprising:
 wherein the ceramic capacitor comprises a ceramic body;   wherein one or more dielectric layers are alternately stacked with two or more conductive layers,   wherein at least one conductive layer comprises an egg-crate shape;   a pair of external termination disposed at two opposite end portions of the body,   wherein the two or more conductive layers are alternately coupled to an external termination of the pair of external termination, and   wherein an electric field is generated between two juxtapose conductive layers when voltage is applied to the pair of external termination.   
     
     
         9 . The method of  claim 8 , further comprising:
 wherein undulations of the egg-crate shape conductive layers vertically align when there are two or more egg-crate shape conductive layers.   
     
     
         10 . The method of  claim 8 , further comprising:
 wherein the undulations of the egg-crate shape conductive layer comprise secondary undulations.   
     
     
         11 . The method of  claim 10 , further comprising:
 wherein the secondary undulations of the egg-crate shape conductive layer comprise tertiary undulations.   
     
     
         12 . The method of  claim 10 , further comprising:
 wherein the secondary undulations of the egg-crate shape conductive layer vertically align when there are two or more egg-crate shape conductive layers comprising secondary undulations, or   wherein the secondary undulations of the egg-crate shape conductive layer do not vertically align when there are two or more egg-crate shape conductive layers comprising secondary undulations.   
     
     
         13 . The method of  claim 10 , further comprising:
 wherein the secondary undulations of the egg-crate shape conductive layer are evenly spaced and sized, or   wherein the secondary undulations of the egg-crate shape conductive layer are not evenly spaced and sized.   
     
     
         14 . The method of  claim 10 , further comprising:
 wherein the secondary undulations of the egg-crate shape conductive layer is disposed on only a portion of the conductive layer.   
     
     
         15 . A method, comprising:
 depositing a first conductive layer onto a surface;   depositing a dielectric layer on a top surface of the first conductive layer;   depositing a second conductive layer a top surface of the dielectric layer;   repeating each step until green part is formed; and   sintering the green part to form a multilayer ceramic capacitor.   
     
     
         16 . The method of  claim 15 , further comprising:
 wherein the ceramic capacitor comprises a ceramic body;   one or more dielectric layers alternately stacked with two or more conductive layers,   wherein at least one conductive layer comprises a wavy shape, and   wherein the wavy shape conductive layers are aligned in a same vertical phase when two or more conductive layers comprise a wavy shape.   
     
     
         17 . The method of  claim 16 , further comprising:
 wherein the thicknesses of the conductive layers and the dielectric layers are spatially uniform throughout each layer, or   wherein the thicknesses of the conductive layer and the dielectric layer are spatially varying throughout each layer.   
     
     
         18 . The method of  claim 16 , further comprising:
 wherein the thicknesses of the conductive layers and the dielectric layers are spatially uniform among respective layers of the multilayer ceramic capacitor, or   wherein the thicknesses of the conductive layers and the dielectric layers are spatially varying among respective layers of the multilayer ceramic capacitor.   
     
     
         19 . The method of  claim 16 , further comprising:
 wherein a plurality of crests of the wavy shape conductive layer comprises a uniform height, or   wherein a plurality of crests of the wavy shape conductive layer comprises varying heights.   
     
     
         20 . The method of  claim 16 , further comprising:
 wherein a thickness of the dielectric layer is constant throughout the layer.