US2019121751A1PendingUtilityA1

Virtualizing physical memory in a virtual machine system

Assignee: INTEL CORPPriority: Jan 14, 2005Filed: Sep 18, 2018Published: Apr 25, 2019
Est. expiryJan 14, 2025(expired)· nominal 20-yr term from priority
G06F 2212/151G06F 9/45533G06F 2009/45583G06F 9/45558G06F 2212/152G06F 2212/657G06F 12/1483G06F 12/109G06F 12/08G06F 9/46
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Claims

Abstract

A processor including a virtualization system of the processor with a memory virtualization support system to map a reference to guest-physical memory made by guest software executable on a virtual machine which in turn is executable on a host machine in which the processor is operable to a reference to host-physical memory of the host machine.

Claims

exact text as granted — not AI-modified
1 .- 13 . (canceled) 
     
     
         14 . A processor comprising:
 a virtualization system of the processor, the virtualization system comprising a memory virtualization support system including an extended paging table to map a reference to guest-physical memory made by guest software executable on a virtual machine which in turn is executable on a host machine in which the processor is operable, to a reference to host-physical memory of the host machine.   
     
     
         15 . The processor of  claim 14  wherein the memory virtualization support system is further to specify restrictions on access and to control access to a location of the guest-physical memory in accordance with the restrictions. 
     
     
         16 . The processor of  claim 14  wherein the memory virtualization support system is further to partition the host-physical memory of the host machine. 
     
     
         17 . The processor of  claim 15  wherein the virtualization support system transitions to a virtual machine monitor in response to an attempt to access memory in violation of the restrictions. 
     
     
         18 . The processor of  claim 14  wherein the extended paging table is further to map a reference to a page of guest-physical memory to a reference to a page of host-physical memory. 
     
     
         19 . The processor of  claim 18  wherein the extended paging table specifies an access restriction for a page of guest-physical memory. 
     
     
         20 . The processor of  claim 19  wherein the access restriction for a page of guest-physical memory comprises at least one of the following:
 read access control information, 
 write access control information, and 
 execute access control information. 
 
     
     
         21 . The processor of  claim 19  wherein the virtualization system transitions to a virtual machine monitor in response to a violation of the access restriction for a page of guest-physical memory. 
     
     
         22 . The processor of  claim 18  wherein the extended paging table comprises a multi-level extended paging table. 
     
     
         23 . The processor of  claim 14  wherein the memory virtualization support system is activated in response to the activation of the virtualization system of the processor only if a flag of the virtualization system is set to a predetermined value. 
     
     
         24 . A method comprising:
 mapping a reference to guest-physical memory made by guest software executable on a virtual machine which in turn is executable on a processor-based host machine, to a reference to host-physical memory of the host machine using an extended paging table of the host machine.   
     
     
         25 . The method of  claim 24  further comprising specifying restrictions on access and controlling access to a location of the guest-physical memory in accordance with the restrictions. 
     
     
         26 . The method of  claim 24  further comprising partitioning the host-physical memory of the host machine. 
     
     
         27 . The method of  claim 25  further comprising the virtualization support system transitioning to a virtual machine monitor in response to an attempt to access memory in violation of the restrictions. 
     
     
         28 . The method of  claim 24  further comprising mapping a reference to a page of guest-physical memory to a reference to a page of host-physical memory. 
     
     
         29 . A processor-based system comprising:
 a virtualization system of a processor, the virtualization system comprising a memory virtualization support system including an extended paging table to map a reference to guest-physical memory made by guest software executable on a virtual machine which in turn is executable on a host machine in which the processor is operable, to a reference to host-physical memory of the host machine.   
     
     
         30 . The system of  claim 29  wherein the memory virtualization support system is further to specify restrictions on access and control access to a location of the guest-physical memory in accordance with the restrictions. 
     
     
         31 . The system of  claim 29  wherein the memory virtualization support system is further to partition the host-physical memory of the host machine. 
     
     
         32 . The system of  claim 30  wherein the virtualization support system transitions to a virtual machine monitor in response to an attempt to access memory in violation of the restrictions. 
     
     
         33 . The system of  claim 29  wherein the extended paging table is further to map a reference to a page of guest-physical memory to a reference to a page of host-physical memory.

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