US2019140747A1PendingUtilityA1

High Speed Isolated and Optical USB

55
Assignee: TEXAS INSTRUMENTS INCPriority: Mar 13, 2015Filed: Dec 27, 2018Published: May 9, 2019
Est. expiryMar 13, 2035(~8.7 yrs left)· nominal 20-yr term from priority
H04L 12/40032H04L 12/40039G06F 13/4068H04B 10/29H04B 10/802H04B 10/25
55
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

A system and method are disclosed for providing electrically isolated communications between two USB2 devices. Two isolating eUSB2 repeaters are utilized to implement a digital isolation barrier between the two USB2 devices. The isolating eUSB2 repeaters are configured to broker isolated communications between the two USB2 devices using a modified eUSB2 protocol that allows the two isolating eUSB2 repeaters to interoperate across the isolating barrier. The modified eUSB2 protocol allows the two isolating eUSB2 repeaters to broker isolating communications on behalf of the USB2 devices without the use of an accurate clock signal. The modified eUSB2 protocol utilized by the isolating eUSB2 repeaters is configured in particular to support certain end-of-packet translations between USB2 data and the modified eUSB2 protocol, management of certain USB2 bus state transitions and assignment of roles to the two isolating eUSB2 repeaters.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . An isolating embedded Universal Serial Bus 2.0 (eUSB2) repeater for providing electrically isolated communications between a first USB2 device and a second USB2 device, the repeater comprising:
 an eUSB2 port coupled to a digital transceiver, the eUSB2 port configured to communicate digital signals via an electrically isolating communication interface with a first isolating eUSB2 repeater configured to communicate the digital signals to the second USB2 device;   a USB2 port coupled to a first USB2 device, the USB2 port configured to receive analog differential pair USB2 communications from the first USB2 device;   a processor;   a memory coupled to the processor, the memory storing computer-readable instructions that, upon execution by the processor, cause the repeater to:
 translate between the USB2 communications received from the first USB2 device and digital signals, wherein the translation utilizes a non-crystal oscillator; 
 communicate the translated digital signals to the second USB2 device via the eUSB2 port and the translated USB2 communications to the first USB2 device via the USB2 port. 
   
     
     
         2 . The repeater of  claim 1 , wherein the translation of the signals is based on the communication speed of the connection between the first USB2 device and the second USB2 device. 
     
     
         3 . The repeater of  claim 1 , wherein the electrically isolating communication interface comprises one of: an optical interface, a line of sight interface, a radio frequency interface, a capacitive interface or an inductive interface. 
     
     
         4 . The repeater of  claim 1 , wherein the translation of USB2 communications comprises translating an end-of-packet signal received from the first USB2 device to a single digital pulse.

Cited by (0)

No later patents cite this yet.

References (0)

No backward citations on record.