Ultrasound apparatuses and methods for fabricating ultrasound devices

Abstract

Aspects of the technology described herein relate to an ultrasound device including a first die that includes an ultrasonic transducer, a first application-specific integrated circuit (ASIC) that is bonded to the first die and includes a pulser, and a second ASIC in communication with the second ASIC that includes integrated digital receive circuitry. In some embodiments, the first ASIC may be bonded to the second ASIC and the second ASIC may include analog processing circuitry and an analog-to-digital converter. In such embodiments, the second ASIC may include a through-silicon via (TSV) facilitating communication between the first ASIC and the second ASIC. In some embodiments, SERDES circuitry facilitates communication between the first ASIC and the second ASIC and the first ASIC includes analog processing circuitry and an analog-to-digital converter. In some embodiments, the technology node of the first ASIC is different from the technology node of the second ASIC.

What is claimed is: 
     
         1 . An ultrasound device, comprising:
 a first die that comprises an ultrasonic transducer;   a first application-specific integrated circuit (ASIC) that is bonded to the first die and comprises a pulser; and   a second ASIC in communication with the first ASIC that comprises integrated digital receive circuitry.   
     
     
         2 . The ultrasound device of  claim 1 , wherein the first ASIC is bonded to the second ASIC. 
     
     
         3 . The ultrasound device of  claim 1 , wherein the second ASIC further comprises analog processing circuitry. 
     
     
         4 . The ultrasound device of  claim 3 , wherein the analog processing circuitry comprises an analog amplifier, an analog filter, analog beamforming circuitry, analog dechirp circuitry, analog quadrature demodulation (AQDM) circuitry, analog time delay circuitry, analog phase shifter circuitry, analog summing circuitry, analog time gain compensation circuitry, and/or analog averaging circuitry. 
     
     
         5 . The ultrasound device of  claim 1 , wherein the second ASIC further comprises an analog-to-digital converter. 
     
     
         6 . The ultrasound device of  claim 1 , wherein the first ASIC comprises a through-silicon via (TSV). 
     
     
         7 . The ultrasound device of  claim 6 , wherein the first ASIC comprises one TSV per ultrasonic transducer in the first die. 
     
     
         8 . The ultrasound device of  claim 6 , wherein the first ASIC comprises one TSV per pulser in the first ASIC. 
     
     
         9 . The ultrasound device of  claim 6 , wherein a height of the TSV is between approximately 4 microns and approximately 750 microns. 
     
     
         10 . The ultrasound device of  claim 6 , wherein:
 the first ASIC comprises a receive switch;   the second ASIC comprises analog processing circuitry; and   the TSV is disposed between the receive switch and the analog processing circuitry in the second ASIC.   
     
     
         11 . The ultrasound device of  claim 1 , wherein the first ASIC further comprises analog processing circuitry. 
     
     
         12 . The ultrasound device of  claim 1 , wherein the first ASIC further comprises an analog-to-digital converter. 
     
     
         13 . The ultrasound device of  claim 1 , further comprising a communication link disposed between the first ASIC and the second ASIC having a data rate of approximately 2-5 gigabits/second. 
     
     
         14 . The ultrasound device of  claim 1 , wherein:
 the first ASIC comprises serial-deserializer (SERDES) transmit circuitry;   the second ASIC comprises SERDES receive circuitry;   a communication link is disposed between the SERDES transmit circuitry and the SERDES receive circuitry; and   the SERDES transmit circuitry and the SERDES receive circuitry are configured to facilitate communication between the first ASIC and the second ASIC over the communication link.   
     
     
         15 . The ultrasound device of  claim 14 , wherein:
 the (a) bonded first die and first ASIC and (b) the second ASIC are coupled to a PCB that comprises a trace; and   the trace on the PCB comprises the communication link.   
     
     
         16 . The ultrasound device of  claim 14 , wherein:
 the first ASIC is bonded to the second ASIC;   the first ASIC comprises a TSV; and   the TSV comprises the communication link.   
     
     
         17 . The ultrasound device of  claim 1 , wherein the integrated digital receive circuitry comprises one or more digital filters, digital beamforming circuitry, digital quadrature demodulation (DQDM) circuitry, averaging circuitry, digital dechirp circuitry, digital time delay circuitry, digital phase shifter circuitry, digital summing circuitry, digital multiplying circuitry, requantization circuitry, waveform removal circuitry, image formation circuitry, backend processing circuitry and/or one or more output buffers. 
     
     
         18 . The ultrasound device of  claim 1 , wherein the first ASIC is implemented in a first technology node, the second ASIC is implemented in a second technology node, and the first technology node is different than the second technology node. 
     
     
         19 . The ultrasound device of  claim 18 , wherein the second technology node is a smaller technology node than the first technology node. 
     
     
         20 . The ultrasound device of  claim 18 , wherein the second technology node is 65 nm, 80 nm, 90 nm, 110 nm, 130 nm, 150 nm, 180 nm, 220 nm, 240 nm, 250 nm, 280 nm, 350 nm, or 500 nm. 
     
     
         21 . The ultrasound device of  claim 18 , wherein the first technology node is 90 nm, 80 nm, 65 nm, 55 nm, 45 nm, 40 nm, 32 nm, 28 nm, 22 nm, 20 nm, 16 nm, 14 nm, 10 nm, 7 nm, 5 nm, or 3 nm. 
     
     
         22 . The ultrasound device of  claim 1 , wherein the integrated digital receive circuitry is configured to operate at an operating voltage in a range of approximately 0.45-0.9 volts. 
     
     
         23 . The ultrasound device of  claim 1 , wherein the integrated digital receive circuitry is configured to operate at an operating voltage in a range of approximately 1-1.8 volts. 
     
     
         24 . The ultrasound device of  claim 1 , wherein the integrated digital receive circuitry is configured to operate at an operating voltage in a range of approximately 2.5-3.3 volts.