Photon-effect transistor

Abstract

A two-terminal photon-effect transistor (PET) is described that simplifies the photo sensing pixel by combing photodiode and field effect transistor dual functions into one simple but effective unit. Photons excite electrons from the valance band of semiconducting material as the electrode-free gate to modulate resistivity between source and drain, which directly results in current amplification of photo signal without traditional photo-electrical conversion and electrical amplification dual processes. PET possesses significance in both structural simplification and functional enhancement. As an implementing example of PET, a nanowire camera (NC) with large sensing area and extremely high resolution is fabricated by integrating millions of vertically aligned nanowire arrays in-between of orthogonal top and bottom nano-stripe electrodes. Each nanowire works as independent three-dimensional (3D) PET pixel, enabling the NC an ultra-high resolution and much simplified architecture. NC has pixel size of 50 nm which is two orders higher than existing CCD and CMOS image sensors.

What is claimed: 
     
         1 . A three-dimensional (3D) photon-effect transistor comprising:
 a source;   a photon-gate, said photon gate is at least partially comprised of one or more vertically-aligned semiconductors; and   a drain.   
     
     
         2 . The 3D photon-effect transistor of  claim 1 , wherein the source, the photon-gate and the drain are integrated onto a single chip. 
     
     
         3 . The 3D photon-effect transistor of  claim 1 , wherein the three-dimensional (3D) photon-effect transistor is configured such that current flow between the source and the drain is controlled by a light signal received by the photon-gate. 
     
     
         4 . The 3D photon-effect transistor of  claim 1 , wherein the photon-gate is at least partially comprised of vertically-aligned semiconducting photonic materials. 
     
     
         5 . The 3D photon-effect transistor of  claim 1 , wherein the photon-gate is at least partially comprised of one or more vertically-aligned nanowires. 
     
     
         6 . The 3D photon-effect transistor of  claim 5 , wherein the one or more vertically-aligned nanowires are comprised of photonic material. 
     
     
         7 . The 3D photon-effect transistor of  claim 6 , wherein the photonic material is at least partially comprised of zinc oxide (ZnO). 
     
     
         8 . The 3D photon-effect transistor of  claim 1 , wherein one or both of the source and the drain are at least partially comprised of material that allow light to pass through them. 
     
     
         9 . The 3D photon-effect transistor of  claim 1 , wherein one or both of the source and the drain are at least partially comprised of translucent materials. 
     
     
         10 . The 3D photon-effect transistor of  claim 1 , wherein one or both of the source and the drain are at least partially comprised of transparent materials. 
     
     
         11 . The 3D photon-effect transistor of  claim 1 , wherein the 3D photon-effect transistor is used to at least partially form a nanowire camera. 
     
     
         12 . A semi-conducting electronic device, comprising:
 a first layer, comprising a plurality of first electrodes arranged therein,   a second layer, comprising a plurality of second electrodes arranged therein, and   a plurality of nanowires of photonic material arranged between the first layer and the second layer, wherein at least one of the nanowires is configured to be electrically connected to one of the first electrodes and one of the second electrodes, respectively.   
     
     
         13 . The semi-conducting electronic device of  claim 12 , wherein the plurality of nanowires comprise an array of the nanowires. 
     
     
         14 . The semi-conducting electronic device of  claim 13 , wherein the plurality of first electrodes comprise a plurality of first stripe electrodes and the plurality of second electrodes comprise a plurality of second stripe electrodes. 
     
     
         15 . The semi-conducting electronic device of  claim 14 , wherein the plurality of first stripe electrodes are arranged, from the top view, to be angled to the plurality of second stripe electrodes. 
     
     
         16 . The semi-conducting electronic device of  claim 14 , wherein the plurality of first strips electrodes are arranged, viewed from the top, to be perpendicular to the plurality of second stripe electrodes. 
     
     
         17 . The semi-conducting electronic device of  claim 14 , wherein at least one of the first stripe electrodes is configured to be electrically connected to multiple nanowires in a longitudinal direction and to only one nanowire in a lateral direction, and wherein at least one of the second stripe electrodes is configured to be electrically connected to multiple nanowires in a longitudinal direction and to only one nanowire in a lateral direction. 
     
     
         18 . The semi-conducting electronic device of  claim 14 , wherein the plurality of first stripe electrodes are arranged to be parallel with each other and the plurality of second stripe electrodes are arranged to be parallel with each other. 
     
     
         19 . The semi-conducting electronic device of  claim 18 , wherein each of the first stripe electrodes is arranged along a line of the nanowire array and each of the second stripe electrodes is arranged along a line of the nanowire array. 
     
     
         20 . The semi-conducting electronic device of  claim 14 , wherein the plurality of first stripe electrodes are arranged to be parallel with each other in a first direction and the plurality of second stripe electrodes are arranged to be parallel with each other in a second, different direction. 
     
     
         21 . The semi-conducting electronic device of  claim 20 , wherein each of the first stripe electrodes is arranged along a line of the nanowire array and each of the second stripe electrodes is arranged along a line of the nanowire array. 
     
     
         22 . The semi-conducting electronic device of  claim 14 , wherein the plurality of first stripe electrodes are arranged to be parallel with each other in a first direction and the plurality of second stripe electrodes are arranged to be parallel with each other in a second direction perpendicular to the first direction. 
     
     
         23 . The semi-conducting electronic device of  claim 22 , wherein each of the first stripe electrodes is arranged along a line of the nanowire array and each of the second stripe electrodes is arranged along a line of the nanowire array. 
     
     
         24 . The semi-conducting electronic device of  claim 14 , wherein the first layer comprises a first substrate in which the plurality of first stripe electrodes are embedded and the second layer comprises a second substrate in which the plurality of second stripe electrodes are embedded. 
     
     
         25 . The semi-conducting electronic device of  claim 12 , wherein one or both of the first and the second layers are at least partially comprised of material that allow light to pass through them. 
     
     
         26 . The semi-conducting electronic device of  claim 12 , wherein the nanowire has a diameter of 50 nm or less. 
     
     
         27 . A nanowire camera comprised of:
 a plurality of photon effect transistors (PETs), each photon effect transistor comprised of:
 a source; 
 a photon-gate; and 
 a drain. 
   
     
     
         28 . The nanowire camera of  claim 27 , wherein the photon gate of each photon-effect transistor is comprised of a nanowire that is at least partially comprised of photonic material that is connected between the source and the drain. 
     
     
         29 . The nanowire camera of  claim 27 , wherein the photonic material is at least partially comprised of zinc oxide (ZnO). 
     
     
         30 . The nanowire camera of  claim 27 , wherein the photonic material is at least partially comprised of any semiconducting material that exhibits a photon effect. 
     
     
         31 . The nanowire camera of  claim 27 , wherein the nanowire is vertically aligned, having a first end and a second end, and the source is connected to one end of the vertically aligned nanowire and the drain is connected to the second end of the vertically aligned nanowire. 
     
     
         32 . The nanowire camera of  claim 27 , wherein the nanowire camera is configured such that current flow between the source and the drain of each photon-effect transistor is controlled by a light signal received by the photon-gate. 
     
     
         33 . The nanowire camera of  claim 27 , wherein the nanowire camera has a pixel size of 50 nm or less. 
     
     
         34 . The nanowire camera of  claim 27 , wherein the source, the photon-gate and the drain are integrated onto a single chip. 
     
     
         35 . The nanowire camera of  claim 27 , wherein one or both of the source and the drain are at least partially comprised of material that allow light to pass through them. 
     
     
         36 . The nanowire camera of  claim 27 , wherein one or both of the source and the drain are at least partially comprised of translucent materials. 
     
     
         37 . The nanowire camera of  claim 27 , wherein one or both of the source and the drain are at least partially comprised of transparent materials. 
     
     
         38 . The nanowire camera of  claim 27 , further comprising a processor, wherein each PET that forms the NC is connected to the processor. 
     
     
         39 . The nanowire camera of  claim 27 , wherein each PET that forms the nanowire camera forms a single pixel for the nanowire camera.