Apparatus and methods for dc bias to improve linearity in signal processing circuits

Abstract

To maintain linear operation of a signal processing circuit, such as a low noise amplifier, a peak detector detects a peak of a signal associated with the signal processing circuit and compares the detected peak signal with a threshold. When the detected peak signal is greater than the threshold, a variable current source biases the signal processing circuit to place the signal processing circuit in a different mode of operation. The signal processing circuit may thereby process a larger input signal while operating in an acceptable linear region.

1 . (canceled) 
     
     
         2 . A biasing circuit assembly comprising:
 a detector configured generate first and second control signals in response to detecting respective first and second thresholds in an output signal;   first and second current sources configured to be enabled by the first control signal to provide additional biasing current to respective first and second signal processing circuits; and   a switch separate from the second current source and configured to be closed by the second control signal to provide the first control signal to the second current source.   
     
     
         3 . The biasing circuit assembly of  claim 2  wherein the output signal includes outputs of the first and second signal processing circuits. 
     
     
         4 . The biasing circuit assembly of  claim 2  wherein the detector is a peak detector. 
     
     
         5 . The biasing circuit assembly of  claim 2  wherein each of the first and second signal processing circuits include a biasing circuit and a biasing current source to provide biasing current to the biasing circuit. 
     
     
         6 . The biasing circuit assembly of  claim 2  wherein each of the first and second signal processing circuits are configured to receive a radio frequency input signal. 
     
     
         7 . The biasing circuit assembly of  claim 2  wherein the output signal is a radio frequency output signal. 
     
     
         8 . The biasing circuit assembly of  claim 2  wherein the first control signal is approximately proportional to the output signal. 
     
     
         9 . The biasing circuit assembly of  claim 2  wherein the first and second current sources are configured to be electrically connected in parallel when the switch is closed. 
     
     
         10 . The biasing circuit assembly of  claim 2  wherein the first and second signal processing circuits are configured to be electrically connected in parallel when the switch is closed. 
     
     
         11 . The biasing circuit assembly of  claim 2  wherein the first and second current sources are variable current sources. 
     
     
         12 . The biasing circuit assembly of  claim 2  wherein the first and second current sources are fixed current sources. 
     
     
         13 . A method to improve amplifier linearity, the method comprising:
 generating first and second control signals in response to detecting respective first and second thresholds in an output signal;   enabling first and second current sources with the first control signal to provide additional biasing current to respective first and second signal processing circuits; and   closing a switch separate from the second current source with the second control signal to provide the first control signal to the second current source.   
     
     
         14 . The method of  claim 13  further comprising receiving at the first and second signal processing circuits a radio frequency input signal. 
     
     
         15 . The method of  claim 13  wherein the output signal is a radio frequency output signal that includes outputs of the first and second signal processing circuits. 
     
     
         16 . The method of  claim 13  wherein each of the first and second signal processing circuits include a low noise amplifier core, a biasing circuit to bias the low noise amplifier core, and a biasing current source to provide biasing current to the biasing circuit. 
     
     
         17 . The method of  claim 16  further comprising biasing the low noise amplifier core of the first signal processing circuit with the additional biasing current provided by the first current source when the first control signal is generated, and biasing the low noise amplifier core of the second signal processing circuit with the additional biasing current provided by the second current source when the second control signal is generated. 
     
     
         18 . A wireless device comprising:
 an antenna configured to receive a radio frequency input signal; and   a receiver including a detector configured generate first and second control signals in response to detecting respective first and second thresholds in a radio frequency output signal, first and second current sources configured to be enabled by the first control signal to provide additional biasing current to respective first and second signal processing circuits, and a switch separate from the second current source and configured to be closed by the second control signal to provide the first control signal to the second current source.   
     
     
         19 . The wireless device of  claim 18  wherein the radio frequency output signal includes outputs of the first and second signal processing circuits. 
     
     
         20 . The wireless device of  claim 18  wherein the first and second current sources are configured to be electrically connected in parallel when the switch is closed. 
     
     
         21 . The wireless device of  claim 18  wherein the first and second signal processing circuits are configured to be electrically connected in parallel when the switch is closed.