Back-to-back stacked dies

Abstract

Embodiments disclosed herein provide for a circuit including first die having an active side and a backside, wherein the first die is flip-chip mounted to a carrier. The circuit also includes a second die stacked on the backside of the first die, wherein the second die is stacked on the first die such that a backside of the second die is facing the backside of the first die and an active side of the second die faces away from the first die.

What is claimed is: 
     
         1 . A circuit comprising:
 a first die having an active side and a backside, wherein the first die is flip-chip mounted to a carrier;   a second die stacked on the backside of the first die, wherein the second die is stacked on the first die such that a backside of the second die is facing the backside of the first die and an active side of the second die faces away from the first die; and   a chip package surrounding the first die and the second die, wherein the carrier includes a plurality of pins, wherein the first die is mounted such that the active side is coupled to one or more of the plurality of pins.   
     
     
         2 . The circuit of  claim 1 , comprising bond wires coupling the active side of the second die to a subset of the plurality of pins, wherein the subset of the plurality of pins are disposed at least partially outward from a footprint of the first die. 
     
     
         3 . The circuit of  claim 2 , wherein a subset of the plurality of pins are disposed to be partially opposite the active side of the first die and partially outward from a footprint of the first die, wherein the subset is coupled to the active side of the first die and to one or more of the plurality of bond wires. 
     
     
         4 . The circuit of  claim 1 , comprising a thermal plug thermally coupled to the backside of the first die and exposed at an outer surface of the chip package. 
     
     
         5 . A circuit comprising:
 a first die having an active side and a backside, wherein the first die is flip-chip mounted to a carrier;   a second die stacked on the backside of the first die, wherein the second die is stacked on the first die such that a backside of the second die is facing the backside of the first die and an active side of the second die faces away from the first die,   wherein first die includes diamond on the backside.   
     
     
         6 . The circuit of  claim 5 , wherein the second die is mounted to the first die using a non-electrically conductive epoxy. 
     
     
         7 . A circuit comprising:
 a first die having an active side and a backside, wherein the first die is flip-chip mounted to a carrier;   a second die stacked on the backside of the first die, wherein the second die is stacked on the first die such that a backside of the second die is facing the backside of the first die and an active side of the second die faces away from the first die; and   a third die stacked on the backside of the first die, wherein the third die is stacked on the first die such that a backside of the third die is facing the backside of the first die and an active side of the third die faces away from the first die.   
     
     
         8 . The circuit of  claim 7 , wherein the first die includes a high side device and a low side device, wherein the high side and low side devices have a lateral structure;
 wherein the second die includes a controller for the high side device and the low side device; and   wherein the third die includes a driver for the high side device and the low side device.   
     
     
         9 . An integrated circuit (IC) comprising:
 a lead frame structure;   a first die with an active side and a backside, the first die mounted to the lead frame structure such that the active side faces the lead frame structure and is coupled to the lead frame structure;   a second die with an active side and a backside, the second die stacked on the first die such that the backside of the second die is facing the backside of the first die; and   a plurality of bond wires coupled to the active side of the second die and to the lead frame structure.   
     
     
         10 . The IC of  claim 9 , wherein the first die includes a metal layer on the backside, the packaged IC including one or more bond wires coupling the metal layer of the first die to the lead frame structure. 
     
     
         11 . The IC of  claim 9 , comprising:
 one of an electrically conductive epoxy or solder physically connecting and electrically coupling the backside of the second die to the backside of the first die.   
     
     
         12 . The IC of  claim 9 , wherein the first die includes a power stage having a high side device and a low side device; and
 wherein the second die includes a controller for the high side device and the low side device.   
     
     
         13 . The IC of  claim 12 , comprising:
 a third die stacked on the backside of the first die, wherein the third die is stacked on the first die such that a backside of the third die is facing the backside of the first die and an active side of the third die faces away from the first die, wherein the third die includes a driver for the high side device and the low side device.   
     
     
         14 . The IC of  claim 9 , comprising:
 a molding compound around the first die and the second die; and   a thermal plug thermally coupled to the backside of the first die and exposed at an outer surface of the molding compound.   
     
     
         15 . The IC of  claim 9 , wherein first die includes diamond on the backside. 
     
     
         16 . The IC of  claim 9 , wherein the first die includes one of solder bumps, copper pillars, or solderable pads coupling the active side to the lead frame structure. 
     
     
         17 . A power conversion system comprising:
 a power stage monolithic integrated circuit (IC) having a lateral structure including an active side and a backside, the active side of the power stage monolithic IC mounted to a carrier;   a controller monolithic IC having a lateral structure including an active side and a backside, the controller monolithic IC stacked on the power stage monolithic IC, the backside of the controller monolithic IC mounted to the backside of the power stage monolithic IC, wherein the controller monolithic IC is configured to control the power stage IC; and   a plurality of bond wires coupled to the active side of the controller monolithic IC and the carrier.   
     
     
         18 . The power conversion system of  claim 17 , wherein the power stage monolithic IC includes a high side field effect transistor (FET) and a low side FET configured to implement a synchronous buck converter. 
     
     
         19 . The power conversion system of  claim 17 , wherein the power stage monolithic IC includes a high side field effect transistor (FET) and a low side diode configured to implement a non-synchronous buck converter. 
     
     
         20 . The power conversion system of  claim 17 , wherein the power stage monolithic IC includes a low side field effect transistor (FET) and a Schottky diode coupled in series with an output load. 
     
     
         21 . The power conversion system of  claim 17 , comprising:
 a driver monolithic IC having a lateral structure with an active side and a backside, the driver monolithic IC stacked on the backside of the power stage monolithic IC, the backside of the driver monolithic IC mounted to the backside of the power stage monolithic IC, the drive monolithic IC configured to drive the power stage monolithic IC.   
     
     
         22 . The power conversion system of  claim 17 , comprising:
 a chip package around the power stage monolithic IC, the controller monolithic IC, and the plurality of bond wires.   
     
     
         23 . The power conversion system of  claim 17 , wherein the carrier includes a printed circuit board. 
     
     
         24 . An electronic device comprising:
 one or more processing devices;   one or more memory devices communicatively coupled to the one or more processing devices; and   one or more power conversion systems coupled to the one or more processing devices and the one or more memory devices, the one or more power conversion systems having a controller die mounted on a power stage die such that a backside of the controller die is attached to a backside of the power stage die and configured to provide regulated power to the one or more processing devices and the one or more memory devices.   
     
     
         25 . The electronic device of  claim 24 , wherein the electronic device comprises one of desktop, laptop, or tablet computer, a set top box, or a battery charger.