Method to generate pattern data over garbage data when encryption parameters are changed

Abstract

A memory device is provided that includes a memory location configured to store information representing data written using a first encryption/decryption method, a read channel configured to read and decrypt information using a second encryption/decryption method and an apparatus configured to prevent the read channel from reading the memory location using the second encryption/decryption method.

1 . A memory device comprising:
 a memory location configured to store information representing data written using a first encryption/decryption method;   a read channel configured to read and decrypt information using a second encryption/decryption method; and   an apparatus configured to prevent the read channel from reading the memory location using the second encryption/decryption method.   
     
     
         2 . The memory device of  claim 1 , wherein the apparatus is configured to receive an indication that the information was written to the memory location using the first encryption/decryption method. 
     
     
         3 . The device of  claim 1 , wherein the apparatus is further configured to:
 associate a flag with the memory location; and   return predefined or custom code for the memory location in response to the read channel using the second encryption/decryption method.   
     
     
         4 . The memory device of  claim 1 , wherein a second encryption parameter associated with the second encryption/decryption method differs from a first encryption parameter associated with the first encryption/decryption method. 
     
     
         5 . The memory device of  claim 1 , wherein a second encryption range parameter associated with the second encryption/decryption method differs from a first encryption range parameter associated with the first encryption/decryption method. 
     
     
         6 . The memory device of  claim 1 , wherein a second encryption key parameter of the second encryption/decryption method differs from a first encryption key parameter of the first encryption/decryption method. 
     
     
         7 . The memory device of  claim 1 , wherein the information representing data comprises a block, the memory location comprises a physical block address, and the device further comprises an indirection system comprising:
 a logical block address; and   a database configured to map the logical block address to the physical block address.   
     
     
         8 . The memory device of  claim 7 , wherein the indirection system further comprises an apparatus configured to indicate the logical block address inaccessible in response to the read channel using the second encryption/decryption method. 
     
     
         9 . The memory device of  claim 7 , wherein the database comprises a flag indicating an encryption/decryption method used to write and read data from the physical block address. 
     
     
         10 . A memory device comprising:
 a memory location configured to store information representing data written using a first encryption/decryption method;   a read channel configured to read and decrypt information using a second encryption/decryption technique; and   an apparatus configured to write a predefined or custom code to the memory location written in response to the read channel using the second encryption/decryption method.   
     
     
         11 . The memory device of  claim 10 , wherein the apparatus is further configured to prevent the read channel from reading the memory location using the second encryption/decryption method. 
     
     
         12 . The memory device of  claim 10 , wherein the apparatus is further configured to:
 associate a flag with the memory location; and   return predefined pattern content for the memory location in response to the read channel using the second encryption/decryption method.   
     
     
         13 . The memory device of  claim 10 , wherein the information representing data comprises a block and the memory location comprises a physical block address, and wherein the memory device further comprises an indirection system that comprises:
 a logical block address; and   a database configured to map the logical block address to the physical block address.   
     
     
         14 . The memory device of  claim 13 , wherein the indirection system further comprises an apparatus configured to indicate the logical block address inaccessible in response to the read channel using the second encryption/decryption method. 
     
     
         15 . The memory device of  claim 13 , wherein a second encryption parameter associated with the second encryption/decryption method differs from a first encryption parameter associated with the first encryption/decryption method. 
     
     
         16 . The memory device of  claim 13 , wherein a second encryption range parameter associated with the second encryption/decryption method differs from a first encryption range parameter associated with the first encryption/decryption method. 
     
     
         17 . The memory device of  claim 13 , wherein a second encryption key parameter of the second encryption/decryption method differs from a first encryption key parameter of the first encryption/decryption method. 
     
     
         18 . A method comprising:
 writing information representing data to a plurality of memory locations of a memory device;   reading information representing data from the plurality of memory locations;   determining that information was written to a first memory location of the plurality of memory locations using a first encryption/decryption method; and   preventing reading the first memory location using a second encryption/decryption method different from the first encryption/decryption method.   
     
     
         19 . The method of  claim 18 , further comprising writing a predefined or custom code to the first memory location in response to a change in the encryption/decryption method from the first encryption/decryption method to the second, different encryption/decryption method. 
     
     
         20 . The method of  claim 18 , further comprising removing a pointer in a map between a logical block address for the first memory location and a physical block address for the first memory location in response to an indication of a change in the encryption/decryption method from the first encryption/decryption method to the second, different encryption/decryption method.