Systems, circuits and methods for correcting dynamic error vector magnitude effects

Abstract

Systems, circuits and methods related to dynamic error vector magnitude (DEVM) corrections. In some embodiments, a power amplifier (PA) system can include a PA circuit having a plurality of amplification stages, and a bias system in communication with the PA circuit and configured to provide bias signals to the amplification stages. The PA system can further include a first correction circuit configured to generate a correction current that results in an adjusted bias signal for a selected amplification stage, with the adjusted bias signal being configured to compensate for an error vector magnitude (EVM) during a dynamic mode of operation. The PA system can further include a second correction circuit configured to change the correction current based on an operating condition associated with the PA circuit.

What is claimed is: 
     
         1 . A power amplifier (PA) system comprising:
 a PA circuit including a plurality of amplification stages;   a bias system in communication with the PA circuit, the bias system configured to provide bias signals to the amplification stages;   a first correction circuit configured to generate a correction current that results in an adjusted bias signal for a selected amplification stage, the adjusted bias signal configured to compensate for an error vector magnitude (EVM) during a dynamic mode of operation; and   a second correction circuit configured to change the correction current based on an operating condition associated with the PA circuit.